1 /* 2 * Copyright (c) 2019-2023, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef ARCH_FEATURES_H 8 #define ARCH_FEATURES_H 9 10 #include <stdbool.h> 11 12 #include <arch_helpers.h> 13 #include <common/feat_detect.h> 14 15 #define ISOLATE_FIELD(reg, feat) \ 16 ((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK))) 17 18 static inline bool is_armv7_gentimer_present(void) 19 { 20 /* The Generic Timer is always present in an ARMv8-A implementation */ 21 return true; 22 } 23 24 static inline unsigned int read_feat_pan_id_field(void) 25 { 26 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN); 27 } 28 29 static inline bool is_feat_pan_supported(void) 30 { 31 if (ENABLE_FEAT_PAN == FEAT_STATE_DISABLED) { 32 return false; 33 } 34 35 if (ENABLE_FEAT_PAN == FEAT_STATE_ALWAYS) { 36 return true; 37 } 38 39 return read_feat_pan_id_field() != 0U; 40 } 41 42 static inline unsigned int read_feat_vhe_id_field(void) 43 { 44 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE); 45 } 46 47 static inline bool is_feat_vhe_supported(void) 48 { 49 if (ENABLE_FEAT_VHE == FEAT_STATE_DISABLED) { 50 return false; 51 } 52 53 if (ENABLE_FEAT_VHE == FEAT_STATE_ALWAYS) { 54 return true; 55 } 56 57 return read_feat_vhe_id_field() != 0U; 58 } 59 60 static inline bool is_armv8_2_ttcnp_present(void) 61 { 62 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) & 63 ID_AA64MMFR2_EL1_CNP_MASK) != 0U; 64 } 65 66 static inline bool is_feat_pacqarma3_present(void) 67 { 68 uint64_t mask_id_aa64isar2 = 69 (ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) | 70 (ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT); 71 72 /* If any of the fields is not zero, QARMA3 algorithm is present */ 73 return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U; 74 } 75 76 static inline bool is_armv8_3_pauth_present(void) 77 { 78 uint64_t mask_id_aa64isar1 = 79 (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) | 80 (ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) | 81 (ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) | 82 (ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT); 83 84 /* 85 * If any of the fields is not zero or QARMA3 is present, 86 * PAuth is present 87 */ 88 return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U || 89 is_feat_pacqarma3_present()); 90 } 91 92 static inline bool is_armv8_4_dit_present(void) 93 { 94 return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & 95 ID_AA64PFR0_DIT_MASK) == 1U; 96 } 97 98 static inline bool is_armv8_4_ttst_present(void) 99 { 100 return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) & 101 ID_AA64MMFR2_EL1_ST_MASK) == 1U; 102 } 103 104 static inline bool is_armv8_5_bti_present(void) 105 { 106 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) & 107 ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED; 108 } 109 110 static inline unsigned int get_armv8_5_mte_support(void) 111 { 112 return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) & 113 ID_AA64PFR1_EL1_MTE_MASK); 114 } 115 116 static inline unsigned int read_feat_sel2_id_field(void) 117 { 118 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2); 119 } 120 121 static inline bool is_feat_sel2_supported(void) 122 { 123 if (ENABLE_FEAT_SEL2 == FEAT_STATE_DISABLED) { 124 return false; 125 } 126 127 if (ENABLE_FEAT_SEL2 == FEAT_STATE_ALWAYS) { 128 return true; 129 } 130 131 return read_feat_sel2_id_field() != 0U; 132 } 133 134 static inline unsigned int read_feat_twed_id_field(void) 135 { 136 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED); 137 } 138 139 static inline bool is_feat_twed_supported(void) 140 { 141 if (ENABLE_FEAT_TWED == FEAT_STATE_DISABLED) { 142 return false; 143 } 144 145 if (ENABLE_FEAT_TWED == FEAT_STATE_ALWAYS) { 146 return true; 147 } 148 149 return read_feat_twed_id_field() != 0U; 150 } 151 152 static unsigned int read_feat_fgt_id_field(void) 153 { 154 return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT); 155 } 156 157 static inline bool is_feat_fgt_supported(void) 158 { 159 if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) { 160 return false; 161 } 162 163 if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) { 164 return true; 165 } 166 167 return read_feat_fgt_id_field() != 0U; 168 } 169 170 static unsigned int read_feat_ecv_id_field(void) 171 { 172 return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_ECV); 173 } 174 175 static inline bool is_feat_ecv_supported(void) 176 { 177 if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) { 178 return false; 179 } 180 181 if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) { 182 return true; 183 } 184 185 return read_feat_ecv_id_field() != 0U; 186 } 187 188 static inline bool is_feat_ecv_v2_supported(void) 189 { 190 if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) { 191 return false; 192 } 193 194 if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) { 195 return true; 196 } 197 198 return read_feat_ecv_id_field() >= ID_AA64MMFR0_EL1_ECV_SELF_SYNCH; 199 } 200 201 static unsigned int read_feat_rng_id_field(void) 202 { 203 return ISOLATE_FIELD(read_id_aa64isar0_el1(), ID_AA64ISAR0_RNDR); 204 } 205 206 static inline bool is_feat_rng_supported(void) 207 { 208 if (ENABLE_FEAT_RNG == FEAT_STATE_DISABLED) { 209 return false; 210 } 211 212 if (ENABLE_FEAT_RNG == FEAT_STATE_ALWAYS) { 213 return true; 214 } 215 216 return read_feat_rng_id_field() != 0U; 217 } 218 219 static unsigned int read_feat_tcrx_id_field(void) 220 { 221 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX); 222 } 223 224 static inline bool is_feat_tcr2_supported(void) 225 { 226 if (ENABLE_FEAT_TCR2 == FEAT_STATE_DISABLED) { 227 return false; 228 } 229 230 if (ENABLE_FEAT_TCR2 == FEAT_STATE_ALWAYS) { 231 return true; 232 } 233 234 return read_feat_tcrx_id_field() != 0U; 235 } 236 237 /******************************************************************************* 238 * Functions to identify the presence of the Activity Monitors Extension 239 ******************************************************************************/ 240 static unsigned int read_feat_amu_id_field(void) 241 { 242 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU); 243 } 244 245 static inline bool is_feat_amu_supported(void) 246 { 247 if (ENABLE_FEAT_AMU == FEAT_STATE_DISABLED) { 248 return false; 249 } 250 251 if (ENABLE_FEAT_AMU == FEAT_STATE_ALWAYS) { 252 return true; 253 } 254 255 return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1; 256 } 257 258 static inline bool is_armv8_6_feat_amuv1p1_present(void) 259 { 260 return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1; 261 } 262 263 /* 264 * Return MPAM version: 265 * 266 * 0x00: None Armv8.0 or later 267 * 0x01: v0.1 Armv8.4 or later 268 * 0x10: v1.0 Armv8.2 or later 269 * 0x11: v1.1 Armv8.4 or later 270 * 271 */ 272 static inline unsigned int read_feat_mpam_version(void) 273 { 274 return (unsigned int)((((read_id_aa64pfr0_el1() >> 275 ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) | 276 ((read_id_aa64pfr1_el1() >> 277 ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK)); 278 } 279 280 static inline bool is_feat_mpam_supported(void) 281 { 282 if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_DISABLED) { 283 return false; 284 } 285 286 if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_ALWAYS) { 287 return true; 288 } 289 290 return read_feat_mpam_version() != 0U; 291 } 292 293 static inline unsigned int read_feat_hcx_id_field(void) 294 { 295 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX); 296 } 297 298 static inline bool is_feat_hcx_supported(void) 299 { 300 if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) { 301 return false; 302 } 303 304 if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) { 305 return true; 306 } 307 308 return read_feat_hcx_id_field() != 0U; 309 } 310 311 static inline bool is_feat_rng_trap_present(void) 312 { 313 return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) & 314 ID_AA64PFR1_EL1_RNDR_TRAP_MASK) 315 == ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED); 316 } 317 318 static inline unsigned int get_armv9_2_feat_rme_support(void) 319 { 320 /* 321 * Return the RME version, zero if not supported. This function can be 322 * used as both an integer value for the RME version or compared to zero 323 * to detect RME presence. 324 */ 325 return (unsigned int)(read_id_aa64pfr0_el1() >> 326 ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK; 327 } 328 329 /********************************************************************************* 330 * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction) 331 ********************************************************************************/ 332 static inline unsigned int read_feat_sb_id_field(void) 333 { 334 return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB); 335 } 336 337 /********************************************************************************* 338 * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2) 339 ********************************************************************************/ 340 static inline unsigned int read_feat_csv2_id_field(void) 341 { 342 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2); 343 } 344 345 static inline bool is_feat_csv2_2_supported(void) 346 { 347 if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_DISABLED) { 348 return false; 349 } 350 351 if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_ALWAYS) { 352 return true; 353 } 354 355 return read_feat_csv2_id_field() >= ID_AA64PFR0_CSV2_2_SUPPORTED; 356 } 357 358 /********************************************************************************** 359 * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension) 360 *********************************************************************************/ 361 static inline unsigned int read_feat_spe_id_field(void) 362 { 363 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMS); 364 } 365 366 static inline bool is_feat_spe_supported(void) 367 { 368 if (ENABLE_SPE_FOR_NS == FEAT_STATE_DISABLED) { 369 return false; 370 } 371 372 if (ENABLE_SPE_FOR_NS == FEAT_STATE_ALWAYS) { 373 return true; 374 } 375 376 return read_feat_spe_id_field() != 0U; 377 } 378 379 /******************************************************************************* 380 * Function to identify the presence of FEAT_SVE (Scalable Vector Extension) 381 ******************************************************************************/ 382 static inline bool is_armv8_2_feat_sve_present(void) 383 { 384 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT) & 385 ID_AA64PFR0_SVE_MASK) == ID_AA64PFR0_SVE_SUPPORTED); 386 } 387 388 /******************************************************************************* 389 * Function to identify the presence of FEAT_RAS (Reliability,Availability, 390 * and Serviceability Extension) 391 ******************************************************************************/ 392 static inline bool is_armv8_2_feat_ras_present(void) 393 { 394 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) & 395 ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED); 396 } 397 398 /************************************************************************** 399 * Function to identify the presence of FEAT_DIT (Data Independent Timing) 400 *************************************************************************/ 401 static inline bool is_armv8_4_feat_dit_present(void) 402 { 403 return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) & 404 ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED); 405 } 406 407 static inline unsigned int read_feat_tracever_id_field(void) 408 { 409 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEVER); 410 } 411 412 static inline bool is_feat_sys_reg_trace_supported(void) 413 { 414 if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_DISABLED) { 415 return false; 416 } 417 418 if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_ALWAYS) { 419 return true; 420 } 421 422 return read_feat_tracever_id_field() != 0U; 423 } 424 425 /************************************************************************* 426 * Function to identify the presence of FEAT_TRF (TraceLift) 427 ************************************************************************/ 428 static inline unsigned int read_feat_trf_id_field(void) 429 { 430 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT); 431 } 432 433 static inline bool is_feat_trf_supported(void) 434 { 435 if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) { 436 return false; 437 } 438 439 if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) { 440 return true; 441 } 442 443 return read_feat_trf_id_field() != 0U; 444 } 445 446 /******************************************************************************** 447 * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization 448 * Support) 449 *******************************************************************************/ 450 static inline unsigned int read_feat_nv_id_field(void) 451 { 452 return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_NV); 453 } 454 455 static inline bool is_feat_nv2_supported(void) 456 { 457 if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_DISABLED) { 458 return false; 459 } 460 461 if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_ALWAYS) { 462 return true; 463 } 464 465 return read_feat_nv_id_field() >= ID_AA64MMFR2_EL1_NV2_SUPPORTED; 466 } 467 468 /******************************************************************************* 469 * Function to identify the presence of FEAT_BRBE (Branch Record Buffer 470 * Extension) 471 ******************************************************************************/ 472 static inline unsigned int read_feat_brbe_id_field(void) 473 { 474 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE); 475 } 476 477 static inline bool is_feat_brbe_supported(void) 478 { 479 if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) { 480 return false; 481 } 482 483 if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) { 484 return true; 485 } 486 487 return read_feat_brbe_id_field() != 0U; 488 } 489 490 /******************************************************************************* 491 * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension) 492 ******************************************************************************/ 493 static inline unsigned int read_feat_trbe_id_field(void) 494 { 495 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER); 496 } 497 498 static inline bool is_feat_trbe_supported(void) 499 { 500 if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) { 501 return false; 502 } 503 504 if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) { 505 return true; 506 } 507 508 return read_feat_trbe_id_field() != 0U; 509 510 } 511 #endif /* ARCH_FEATURES_H */ 512