xref: /rk3399_ARM-atf/include/arch/aarch64/arch_features.h (revision 9a905a7d86867bab8a5d9befd40a67a6ab9aaea2) 
1 /*
2  * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef ARCH_FEATURES_H
8 #define ARCH_FEATURES_H
9 
10 #include <stdbool.h>
11 
12 #include <arch_helpers.h>
13 #include <common/feat_detect.h>
14 
15 #define ISOLATE_FIELD(reg, feat)					\
16 	((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK)))
17 
18 static inline bool is_armv7_gentimer_present(void)
19 {
20 	/* The Generic Timer is always present in an ARMv8-A implementation */
21 	return true;
22 }
23 
24 static inline unsigned int read_feat_pan_id_field(void)
25 {
26 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN);
27 }
28 
29 static inline bool is_feat_pan_supported(void)
30 {
31 	if (ENABLE_FEAT_PAN == FEAT_STATE_DISABLED) {
32 		return false;
33 	}
34 
35 	if (ENABLE_FEAT_PAN == FEAT_STATE_ALWAYS) {
36 		return true;
37 	}
38 
39 	return read_feat_pan_id_field() != 0U;
40 }
41 
42 static inline unsigned int read_feat_vhe_id_field(void)
43 {
44 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE);
45 }
46 
47 static inline bool is_feat_vhe_supported(void)
48 {
49 	if (ENABLE_FEAT_VHE == FEAT_STATE_DISABLED) {
50 		return false;
51 	}
52 
53 	if (ENABLE_FEAT_VHE == FEAT_STATE_ALWAYS) {
54 		return true;
55 	}
56 
57 	return read_feat_vhe_id_field() != 0U;
58 }
59 
60 static inline bool is_armv8_2_ttcnp_present(void)
61 {
62 	return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) &
63 		ID_AA64MMFR2_EL1_CNP_MASK) != 0U;
64 }
65 
66 static inline bool is_feat_pacqarma3_present(void)
67 {
68 	uint64_t mask_id_aa64isar2 =
69 			(ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) |
70 			(ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT);
71 
72 	/* If any of the fields is not zero, QARMA3 algorithm is present */
73 	return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U;
74 }
75 
76 static inline bool is_armv8_3_pauth_present(void)
77 {
78 	uint64_t mask_id_aa64isar1 =
79 		(ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
80 		(ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
81 		(ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
82 		(ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
83 
84 	/*
85 	 * If any of the fields is not zero or QARMA3 is present,
86 	 * PAuth is present
87 	 */
88 	return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U ||
89 		is_feat_pacqarma3_present());
90 }
91 
92 static inline bool is_armv8_4_dit_present(void)
93 {
94 	return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
95 		ID_AA64PFR0_DIT_MASK) == 1U;
96 }
97 
98 static inline bool is_armv8_4_ttst_present(void)
99 {
100 	return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
101 		ID_AA64MMFR2_EL1_ST_MASK) == 1U;
102 }
103 
104 static inline bool is_armv8_5_bti_present(void)
105 {
106 	return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) &
107 		ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
108 }
109 
110 static inline unsigned int get_armv8_5_mte_support(void)
111 {
112 	return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
113 		ID_AA64PFR1_EL1_MTE_MASK);
114 }
115 
116 static inline unsigned int read_feat_sel2_id_field(void)
117 {
118 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2);
119 }
120 
121 static inline bool is_feat_sel2_supported(void)
122 {
123 	if (ENABLE_FEAT_SEL2 == FEAT_STATE_DISABLED) {
124 		return false;
125 	}
126 
127 	if (ENABLE_FEAT_SEL2 == FEAT_STATE_ALWAYS) {
128 		return true;
129 	}
130 
131 	return read_feat_sel2_id_field() != 0U;
132 }
133 
134 static inline unsigned int read_feat_twed_id_field(void)
135 {
136 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED);
137 }
138 
139 static inline bool is_feat_twed_supported(void)
140 {
141 	if (ENABLE_FEAT_TWED == FEAT_STATE_DISABLED) {
142 		return false;
143 	}
144 
145 	if (ENABLE_FEAT_TWED == FEAT_STATE_ALWAYS) {
146 		return true;
147 	}
148 
149 	return read_feat_twed_id_field() != 0U;
150 }
151 
152 static unsigned int read_feat_fgt_id_field(void)
153 {
154 	return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT);
155 }
156 
157 static inline bool is_feat_fgt_supported(void)
158 {
159 	if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) {
160 		return false;
161 	}
162 
163 	if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) {
164 		return true;
165 	}
166 
167 	return read_feat_fgt_id_field() != 0U;
168 }
169 
170 static unsigned int read_feat_ecv_id_field(void)
171 {
172 	return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_ECV);
173 }
174 
175 static inline bool is_feat_ecv_supported(void)
176 {
177 	if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) {
178 		return false;
179 	}
180 
181 	if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) {
182 		return true;
183 	}
184 
185 	return read_feat_ecv_id_field() != 0U;
186 }
187 
188 static inline bool is_feat_ecv_v2_supported(void)
189 {
190 	if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) {
191 		return false;
192 	}
193 
194 	if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) {
195 		return true;
196 	}
197 
198 	return read_feat_ecv_id_field() >= ID_AA64MMFR0_EL1_ECV_SELF_SYNCH;
199 }
200 
201 static unsigned int read_feat_rng_id_field(void)
202 {
203 	return ISOLATE_FIELD(read_id_aa64isar0_el1(), ID_AA64ISAR0_RNDR);
204 }
205 
206 static inline bool is_feat_rng_supported(void)
207 {
208 	if (ENABLE_FEAT_RNG == FEAT_STATE_DISABLED) {
209 		return false;
210 	}
211 
212 	if (ENABLE_FEAT_RNG == FEAT_STATE_ALWAYS) {
213 		return true;
214 	}
215 
216 	return read_feat_rng_id_field() != 0U;
217 }
218 
219 static unsigned int read_feat_tcrx_id_field(void)
220 {
221 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX);
222 }
223 
224 static inline bool is_feat_tcr2_supported(void)
225 {
226 	if (ENABLE_FEAT_TCR2 == FEAT_STATE_DISABLED) {
227 		return false;
228 	}
229 
230 	if (ENABLE_FEAT_TCR2 == FEAT_STATE_ALWAYS) {
231 		return true;
232 	}
233 
234 	return read_feat_tcrx_id_field() != 0U;
235 }
236 
237 static unsigned int read_feat_s2poe_id_field(void)
238 {
239 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2POE);
240 }
241 
242 static inline bool is_feat_s2poe_supported(void)
243 {
244 	if (ENABLE_FEAT_S2POE == FEAT_STATE_DISABLED) {
245 		return false;
246 	}
247 
248 	if (ENABLE_FEAT_S2POE == FEAT_STATE_ALWAYS) {
249 		return true;
250 	}
251 
252 	return read_feat_s2poe_id_field() != 0U;
253 }
254 
255 static unsigned int read_feat_s1poe_id_field(void)
256 {
257 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1POE);
258 }
259 
260 static inline bool is_feat_s1poe_supported(void)
261 {
262 	if (ENABLE_FEAT_S1POE == FEAT_STATE_DISABLED) {
263 		return false;
264 	}
265 
266 	if (ENABLE_FEAT_S1POE == FEAT_STATE_ALWAYS) {
267 		return true;
268 	}
269 
270 	return read_feat_s1poe_id_field() != 0U;
271 }
272 
273 static inline bool is_feat_sxpoe_supported(void)
274 {
275 	return is_feat_s1poe_supported() || is_feat_s2poe_supported();
276 }
277 
278 static unsigned int read_feat_s2pie_id_field(void)
279 {
280 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2PIE);
281 }
282 
283 static inline bool is_feat_s2pie_supported(void)
284 {
285 	if (ENABLE_FEAT_S2PIE == FEAT_STATE_DISABLED) {
286 		return false;
287 	}
288 
289 	if (ENABLE_FEAT_S2PIE == FEAT_STATE_ALWAYS) {
290 		return true;
291 	}
292 
293 	return read_feat_s2pie_id_field() != 0U;
294 }
295 
296 static unsigned int read_feat_s1pie_id_field(void)
297 {
298 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1PIE);
299 }
300 
301 static inline bool is_feat_s1pie_supported(void)
302 {
303 	if (ENABLE_FEAT_S1PIE == FEAT_STATE_DISABLED) {
304 		return false;
305 	}
306 
307 	if (ENABLE_FEAT_S1PIE == FEAT_STATE_ALWAYS) {
308 		return true;
309 	}
310 
311 	return read_feat_s1pie_id_field() != 0U;
312 }
313 
314 static inline bool is_feat_sxpie_supported(void)
315 {
316 	return is_feat_s1pie_supported() || is_feat_s2pie_supported();
317 }
318 
319 /*******************************************************************************
320  * Functions to identify the presence of the Activity Monitors Extension
321  ******************************************************************************/
322 static unsigned int read_feat_amu_id_field(void)
323 {
324 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU);
325 }
326 
327 static inline bool is_feat_amu_supported(void)
328 {
329 	if (ENABLE_FEAT_AMU == FEAT_STATE_DISABLED) {
330 		return false;
331 	}
332 
333 	if (ENABLE_FEAT_AMU == FEAT_STATE_ALWAYS) {
334 		return true;
335 	}
336 
337 	return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1;
338 }
339 
340 static inline bool is_feat_amuv1p1_supported(void)
341 {
342 	if (ENABLE_FEAT_AMUv1p1 == FEAT_STATE_DISABLED) {
343 		return false;
344 	}
345 
346 	if (ENABLE_FEAT_AMUv1p1 == FEAT_STATE_ALWAYS) {
347 		return true;
348 	}
349 
350 	return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1;
351 }
352 
353 /*
354  * Return MPAM version:
355  *
356  * 0x00: None Armv8.0 or later
357  * 0x01: v0.1 Armv8.4 or later
358  * 0x10: v1.0 Armv8.2 or later
359  * 0x11: v1.1 Armv8.4 or later
360  *
361  */
362 static inline unsigned int read_feat_mpam_version(void)
363 {
364 	return (unsigned int)((((read_id_aa64pfr0_el1() >>
365 		ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
366 				((read_id_aa64pfr1_el1() >>
367 		ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
368 }
369 
370 static inline bool is_feat_mpam_supported(void)
371 {
372 	if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_DISABLED) {
373 		return false;
374 	}
375 
376 	if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_ALWAYS) {
377 		return true;
378 	}
379 
380 	return read_feat_mpam_version() != 0U;
381 }
382 
383 static inline unsigned int read_feat_hcx_id_field(void)
384 {
385 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX);
386 }
387 
388 static inline bool is_feat_hcx_supported(void)
389 {
390 	if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) {
391 		return false;
392 	}
393 
394 	if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) {
395 		return true;
396 	}
397 
398 	return read_feat_hcx_id_field() != 0U;
399 }
400 
401 static inline bool is_feat_rng_trap_present(void)
402 {
403 	return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) &
404 			ID_AA64PFR1_EL1_RNDR_TRAP_MASK)
405 			== ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED);
406 }
407 
408 static inline unsigned int get_armv9_2_feat_rme_support(void)
409 {
410 	/*
411 	 * Return the RME version, zero if not supported.  This function can be
412 	 * used as both an integer value for the RME version or compared to zero
413 	 * to detect RME presence.
414 	 */
415 	return (unsigned int)(read_id_aa64pfr0_el1() >>
416 		ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK;
417 }
418 
419 /*********************************************************************************
420  * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction)
421  ********************************************************************************/
422 static inline unsigned int read_feat_sb_id_field(void)
423 {
424 	return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB);
425 }
426 
427 /*********************************************************************************
428  * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2)
429  ********************************************************************************/
430 static inline unsigned int read_feat_csv2_id_field(void)
431 {
432 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2);
433 }
434 
435 static inline bool is_feat_csv2_2_supported(void)
436 {
437 	if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_DISABLED) {
438 		return false;
439 	}
440 
441 	if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_ALWAYS) {
442 		return true;
443 	}
444 
445 	return read_feat_csv2_id_field() >= ID_AA64PFR0_CSV2_2_SUPPORTED;
446 }
447 
448 /**********************************************************************************
449  * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension)
450  *********************************************************************************/
451 static inline unsigned int read_feat_spe_id_field(void)
452 {
453 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMS);
454 }
455 
456 static inline bool is_feat_spe_supported(void)
457 {
458 	if (ENABLE_SPE_FOR_NS == FEAT_STATE_DISABLED) {
459 		return false;
460 	}
461 
462 	if (ENABLE_SPE_FOR_NS == FEAT_STATE_ALWAYS) {
463 		return true;
464 	}
465 
466 	return read_feat_spe_id_field() != 0U;
467 }
468 
469 /*******************************************************************************
470  * Function to identify the presence of FEAT_SVE (Scalable Vector Extension)
471  ******************************************************************************/
472 static inline unsigned int read_feat_sve_id_field(void)
473 {
474 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SVE);
475 }
476 
477 static inline bool is_feat_sve_supported(void)
478 {
479 	if (ENABLE_SVE_FOR_NS == FEAT_STATE_DISABLED) {
480 		return false;
481 	}
482 
483 	if (ENABLE_SVE_FOR_NS == FEAT_STATE_ALWAYS) {
484 		return true;
485 	}
486 
487 	return read_feat_sve_id_field() >= ID_AA64PFR0_SVE_SUPPORTED;
488 }
489 
490 /*******************************************************************************
491  * Function to identify the presence of FEAT_RAS (Reliability,Availability,
492  * and Serviceability Extension)
493  ******************************************************************************/
494 static inline bool is_armv8_2_feat_ras_present(void)
495 {
496 	return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) &
497 		ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED);
498 }
499 
500 /**************************************************************************
501  * Function to identify the presence of FEAT_DIT (Data Independent Timing)
502  *************************************************************************/
503 static inline bool is_armv8_4_feat_dit_present(void)
504 {
505 	return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
506 		ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED);
507 }
508 
509 static inline unsigned int read_feat_tracever_id_field(void)
510 {
511 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEVER);
512 }
513 
514 static inline bool is_feat_sys_reg_trace_supported(void)
515 {
516 	if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_DISABLED) {
517 		return false;
518 	}
519 
520 	if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_ALWAYS) {
521 		return true;
522 	}
523 
524 	return read_feat_tracever_id_field() != 0U;
525 }
526 
527 /*************************************************************************
528  * Function to identify the presence of FEAT_TRF (TraceLift)
529  ************************************************************************/
530 static inline unsigned int read_feat_trf_id_field(void)
531 {
532 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT);
533 }
534 
535 static inline bool is_feat_trf_supported(void)
536 {
537 	if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) {
538 		return false;
539 	}
540 
541 	if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) {
542 		return true;
543 	}
544 
545 	return read_feat_trf_id_field() != 0U;
546 }
547 
548 /********************************************************************************
549  * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization
550  * Support)
551  *******************************************************************************/
552 static inline unsigned int read_feat_nv_id_field(void)
553 {
554 	return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_NV);
555 }
556 
557 static inline bool is_feat_nv2_supported(void)
558 {
559 	if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_DISABLED) {
560 		return false;
561 	}
562 
563 	if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_ALWAYS) {
564 		return true;
565 	}
566 
567 	return read_feat_nv_id_field() >= ID_AA64MMFR2_EL1_NV2_SUPPORTED;
568 }
569 
570 /*******************************************************************************
571  * Function to identify the presence of FEAT_BRBE (Branch Record Buffer
572  * Extension)
573  ******************************************************************************/
574 static inline unsigned int read_feat_brbe_id_field(void)
575 {
576 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE);
577 }
578 
579 static inline bool is_feat_brbe_supported(void)
580 {
581 	if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) {
582 		return false;
583 	}
584 
585 	if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) {
586 		return true;
587 	}
588 
589 	return read_feat_brbe_id_field() != 0U;
590 }
591 
592 /*******************************************************************************
593  * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension)
594  ******************************************************************************/
595 static inline unsigned int read_feat_trbe_id_field(void)
596 {
597 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER);
598 }
599 
600 static inline bool is_feat_trbe_supported(void)
601 {
602 	if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) {
603 		return false;
604 	}
605 
606 	if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) {
607 		return true;
608 	}
609 
610 	return read_feat_trbe_id_field() != 0U;
611 
612 }
613 /*******************************************************************************
614  * Function to identify the presence of FEAT_SMEx (Scalar Matrix Extension)
615  ******************************************************************************/
616 static inline unsigned int read_feat_sme_fa64_id_field(void)
617 {
618 	return ISOLATE_FIELD(read_id_aa64smfr0_el1(), ID_AA64SMFR0_EL1_SME_FA64);
619 }
620 
621 static inline unsigned int read_feat_sme_id_field(void)
622 {
623 	return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_SME);
624 }
625 
626 static inline bool is_feat_sme_supported(void)
627 {
628 	if (ENABLE_SME_FOR_NS == FEAT_STATE_DISABLED) {
629 		return false;
630 	}
631 
632 	if (ENABLE_SME_FOR_NS == FEAT_STATE_ALWAYS) {
633 		return true;
634 	}
635 
636 	return read_feat_sme_id_field() >= ID_AA64PFR1_EL1_SME_SUPPORTED;
637 }
638 
639 #endif /* ARCH_FEATURES_H */
640