xref: /rk3399_ARM-atf/include/arch/aarch64/arch_features.h (revision 688ab57b9349adb19277d88f2469ceeadb8ba083) 
1 /*
2  * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef ARCH_FEATURES_H
8 #define ARCH_FEATURES_H
9 
10 #include <stdbool.h>
11 
12 #include <arch_helpers.h>
13 #include <common/feat_detect.h>
14 
15 #define ISOLATE_FIELD(reg, feat)					\
16 	((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK)))
17 
18 static inline bool is_armv7_gentimer_present(void)
19 {
20 	/* The Generic Timer is always present in an ARMv8-A implementation */
21 	return true;
22 }
23 
24 static inline unsigned int read_feat_pan_id_field(void)
25 {
26 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN);
27 }
28 
29 static inline bool is_feat_pan_supported(void)
30 {
31 	if (ENABLE_FEAT_PAN == FEAT_STATE_DISABLED) {
32 		return false;
33 	}
34 
35 	if (ENABLE_FEAT_PAN == FEAT_STATE_ALWAYS) {
36 		return true;
37 	}
38 
39 	return read_feat_pan_id_field() != 0U;
40 }
41 
42 static inline unsigned int read_feat_vhe_id_field(void)
43 {
44 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE);
45 }
46 
47 static inline bool is_feat_vhe_supported(void)
48 {
49 	if (ENABLE_FEAT_VHE == FEAT_STATE_DISABLED) {
50 		return false;
51 	}
52 
53 	if (ENABLE_FEAT_VHE == FEAT_STATE_ALWAYS) {
54 		return true;
55 	}
56 
57 	return read_feat_vhe_id_field() != 0U;
58 }
59 
60 static inline bool is_armv8_2_ttcnp_present(void)
61 {
62 	return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) &
63 		ID_AA64MMFR2_EL1_CNP_MASK) != 0U;
64 }
65 
66 static inline bool is_feat_pacqarma3_present(void)
67 {
68 	uint64_t mask_id_aa64isar2 =
69 			(ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) |
70 			(ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT);
71 
72 	/* If any of the fields is not zero, QARMA3 algorithm is present */
73 	return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U;
74 }
75 
76 static inline bool is_armv8_3_pauth_present(void)
77 {
78 	uint64_t mask_id_aa64isar1 =
79 		(ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
80 		(ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
81 		(ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
82 		(ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
83 
84 	/*
85 	 * If any of the fields is not zero or QARMA3 is present,
86 	 * PAuth is present
87 	 */
88 	return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U ||
89 		is_feat_pacqarma3_present());
90 }
91 
92 static inline bool is_armv8_4_dit_present(void)
93 {
94 	return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
95 		ID_AA64PFR0_DIT_MASK) == 1U;
96 }
97 
98 static inline bool is_armv8_4_ttst_present(void)
99 {
100 	return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
101 		ID_AA64MMFR2_EL1_ST_MASK) == 1U;
102 }
103 
104 static inline bool is_armv8_5_bti_present(void)
105 {
106 	return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) &
107 		ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
108 }
109 
110 static inline unsigned int get_armv8_5_mte_support(void)
111 {
112 	return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
113 		ID_AA64PFR1_EL1_MTE_MASK);
114 }
115 
116 static inline unsigned int read_feat_sel2_id_field(void)
117 {
118 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2);
119 }
120 
121 static inline bool is_feat_sel2_supported(void)
122 {
123 	if (ENABLE_FEAT_SEL2 == FEAT_STATE_DISABLED) {
124 		return false;
125 	}
126 
127 	if (ENABLE_FEAT_SEL2 == FEAT_STATE_ALWAYS) {
128 		return true;
129 	}
130 
131 	return read_feat_sel2_id_field() != 0U;
132 }
133 
134 static inline unsigned int read_feat_twed_id_field(void)
135 {
136 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED);
137 }
138 
139 static inline bool is_feat_twed_supported(void)
140 {
141 	if (ENABLE_FEAT_TWED == FEAT_STATE_DISABLED) {
142 		return false;
143 	}
144 
145 	if (ENABLE_FEAT_TWED == FEAT_STATE_ALWAYS) {
146 		return true;
147 	}
148 
149 	return read_feat_twed_id_field() != 0U;
150 }
151 
152 static unsigned int read_feat_fgt_id_field(void)
153 {
154 	return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT);
155 }
156 
157 static inline bool is_feat_fgt_supported(void)
158 {
159 	if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) {
160 		return false;
161 	}
162 
163 	if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) {
164 		return true;
165 	}
166 
167 	return read_feat_fgt_id_field() != 0U;
168 }
169 
170 static unsigned int read_feat_ecv_id_field(void)
171 {
172 	return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_ECV);
173 }
174 
175 static inline bool is_feat_ecv_supported(void)
176 {
177 	if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) {
178 		return false;
179 	}
180 
181 	if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) {
182 		return true;
183 	}
184 
185 	return read_feat_ecv_id_field() != 0U;
186 }
187 
188 static inline bool is_feat_ecv_v2_supported(void)
189 {
190 	if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) {
191 		return false;
192 	}
193 
194 	if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) {
195 		return true;
196 	}
197 
198 	return read_feat_ecv_id_field() >= ID_AA64MMFR0_EL1_ECV_SELF_SYNCH;
199 }
200 
201 static unsigned int read_feat_rng_id_field(void)
202 {
203 	return ISOLATE_FIELD(read_id_aa64isar0_el1(), ID_AA64ISAR0_RNDR);
204 }
205 
206 static inline bool is_feat_rng_supported(void)
207 {
208 	if (ENABLE_FEAT_RNG == FEAT_STATE_DISABLED) {
209 		return false;
210 	}
211 
212 	if (ENABLE_FEAT_RNG == FEAT_STATE_ALWAYS) {
213 		return true;
214 	}
215 
216 	return read_feat_rng_id_field() != 0U;
217 }
218 
219 static unsigned int read_feat_tcrx_id_field(void)
220 {
221 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX);
222 }
223 
224 static inline bool is_feat_tcr2_supported(void)
225 {
226 	if (ENABLE_FEAT_TCR2 == FEAT_STATE_DISABLED) {
227 		return false;
228 	}
229 
230 	if (ENABLE_FEAT_TCR2 == FEAT_STATE_ALWAYS) {
231 		return true;
232 	}
233 
234 	return read_feat_tcrx_id_field() != 0U;
235 }
236 
237 static unsigned int read_feat_s2poe_id_field(void)
238 {
239 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2POE);
240 }
241 
242 static inline bool is_feat_s2poe_supported(void)
243 {
244 	if (ENABLE_FEAT_S2POE == FEAT_STATE_DISABLED) {
245 		return false;
246 	}
247 
248 	if (ENABLE_FEAT_S2POE == FEAT_STATE_ALWAYS) {
249 		return true;
250 	}
251 
252 	return read_feat_s2poe_id_field() != 0U;
253 }
254 
255 static unsigned int read_feat_s1poe_id_field(void)
256 {
257 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1POE);
258 }
259 
260 static inline bool is_feat_s1poe_supported(void)
261 {
262 	if (ENABLE_FEAT_S1POE == FEAT_STATE_DISABLED) {
263 		return false;
264 	}
265 
266 	if (ENABLE_FEAT_S1POE == FEAT_STATE_ALWAYS) {
267 		return true;
268 	}
269 
270 	return read_feat_s1poe_id_field() != 0U;
271 }
272 
273 static inline bool is_feat_sxpoe_supported(void)
274 {
275 	return is_feat_s1poe_supported() || is_feat_s2poe_supported();
276 }
277 
278 static unsigned int read_feat_s2pie_id_field(void)
279 {
280 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2PIE);
281 }
282 
283 static inline bool is_feat_s2pie_supported(void)
284 {
285 	if (ENABLE_FEAT_S2PIE == FEAT_STATE_DISABLED) {
286 		return false;
287 	}
288 
289 	if (ENABLE_FEAT_S2PIE == FEAT_STATE_ALWAYS) {
290 		return true;
291 	}
292 
293 	return read_feat_s2pie_id_field() != 0U;
294 }
295 
296 static unsigned int read_feat_s1pie_id_field(void)
297 {
298 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1PIE);
299 }
300 
301 static inline bool is_feat_s1pie_supported(void)
302 {
303 	if (ENABLE_FEAT_S1PIE == FEAT_STATE_DISABLED) {
304 		return false;
305 	}
306 
307 	if (ENABLE_FEAT_S1PIE == FEAT_STATE_ALWAYS) {
308 		return true;
309 	}
310 
311 	return read_feat_s1pie_id_field() != 0U;
312 }
313 
314 static inline bool is_feat_sxpie_supported(void)
315 {
316 	return is_feat_s1pie_supported() || is_feat_s2pie_supported();
317 }
318 
319 static unsigned int read_feat_gcs_id_field(void)
320 {
321 	return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_GCS);
322 }
323 
324 static inline bool is_feat_gcs_supported(void)
325 {
326 	if (ENABLE_FEAT_GCS == FEAT_STATE_DISABLED) {
327 		return false;
328 	}
329 
330 	if (ENABLE_FEAT_GCS == FEAT_STATE_ALWAYS) {
331 		return true;
332 	}
333 
334 	return read_feat_gcs_id_field() != 0U;
335 }
336 
337 /*******************************************************************************
338  * Functions to identify the presence of the Activity Monitors Extension
339  ******************************************************************************/
340 static unsigned int read_feat_amu_id_field(void)
341 {
342 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU);
343 }
344 
345 static inline bool is_feat_amu_supported(void)
346 {
347 	if (ENABLE_FEAT_AMU == FEAT_STATE_DISABLED) {
348 		return false;
349 	}
350 
351 	if (ENABLE_FEAT_AMU == FEAT_STATE_ALWAYS) {
352 		return true;
353 	}
354 
355 	return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1;
356 }
357 
358 static inline bool is_feat_amuv1p1_supported(void)
359 {
360 	if (ENABLE_FEAT_AMUv1p1 == FEAT_STATE_DISABLED) {
361 		return false;
362 	}
363 
364 	if (ENABLE_FEAT_AMUv1p1 == FEAT_STATE_ALWAYS) {
365 		return true;
366 	}
367 
368 	return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1;
369 }
370 
371 /*
372  * Return MPAM version:
373  *
374  * 0x00: None Armv8.0 or later
375  * 0x01: v0.1 Armv8.4 or later
376  * 0x10: v1.0 Armv8.2 or later
377  * 0x11: v1.1 Armv8.4 or later
378  *
379  */
380 static inline unsigned int read_feat_mpam_version(void)
381 {
382 	return (unsigned int)((((read_id_aa64pfr0_el1() >>
383 		ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
384 				((read_id_aa64pfr1_el1() >>
385 		ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
386 }
387 
388 static inline bool is_feat_mpam_supported(void)
389 {
390 	if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_DISABLED) {
391 		return false;
392 	}
393 
394 	if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_ALWAYS) {
395 		return true;
396 	}
397 
398 	return read_feat_mpam_version() != 0U;
399 }
400 
401 static inline unsigned int read_feat_hcx_id_field(void)
402 {
403 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX);
404 }
405 
406 static inline bool is_feat_hcx_supported(void)
407 {
408 	if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) {
409 		return false;
410 	}
411 
412 	if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) {
413 		return true;
414 	}
415 
416 	return read_feat_hcx_id_field() != 0U;
417 }
418 
419 static inline bool is_feat_rng_trap_present(void)
420 {
421 	return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) &
422 			ID_AA64PFR1_EL1_RNDR_TRAP_MASK)
423 			== ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED);
424 }
425 
426 static inline unsigned int get_armv9_2_feat_rme_support(void)
427 {
428 	/*
429 	 * Return the RME version, zero if not supported.  This function can be
430 	 * used as both an integer value for the RME version or compared to zero
431 	 * to detect RME presence.
432 	 */
433 	return (unsigned int)(read_id_aa64pfr0_el1() >>
434 		ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK;
435 }
436 
437 /*********************************************************************************
438  * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction)
439  ********************************************************************************/
440 static inline unsigned int read_feat_sb_id_field(void)
441 {
442 	return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB);
443 }
444 
445 /*********************************************************************************
446  * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2)
447  ********************************************************************************/
448 static inline unsigned int read_feat_csv2_id_field(void)
449 {
450 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2);
451 }
452 
453 static inline bool is_feat_csv2_2_supported(void)
454 {
455 	if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_DISABLED) {
456 		return false;
457 	}
458 
459 	if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_ALWAYS) {
460 		return true;
461 	}
462 
463 	return read_feat_csv2_id_field() >= ID_AA64PFR0_CSV2_2_SUPPORTED;
464 }
465 
466 /**********************************************************************************
467  * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension)
468  *********************************************************************************/
469 static inline unsigned int read_feat_spe_id_field(void)
470 {
471 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMS);
472 }
473 
474 static inline bool is_feat_spe_supported(void)
475 {
476 	if (ENABLE_SPE_FOR_NS == FEAT_STATE_DISABLED) {
477 		return false;
478 	}
479 
480 	if (ENABLE_SPE_FOR_NS == FEAT_STATE_ALWAYS) {
481 		return true;
482 	}
483 
484 	return read_feat_spe_id_field() != 0U;
485 }
486 
487 /*******************************************************************************
488  * Function to identify the presence of FEAT_SVE (Scalable Vector Extension)
489  ******************************************************************************/
490 static inline unsigned int read_feat_sve_id_field(void)
491 {
492 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SVE);
493 }
494 
495 static inline bool is_feat_sve_supported(void)
496 {
497 	if (ENABLE_SVE_FOR_NS == FEAT_STATE_DISABLED) {
498 		return false;
499 	}
500 
501 	if (ENABLE_SVE_FOR_NS == FEAT_STATE_ALWAYS) {
502 		return true;
503 	}
504 
505 	return read_feat_sve_id_field() >= ID_AA64PFR0_SVE_SUPPORTED;
506 }
507 
508 /*******************************************************************************
509  * Function to identify the presence of FEAT_RAS (Reliability,Availability,
510  * and Serviceability Extension)
511  ******************************************************************************/
512 static inline bool is_armv8_2_feat_ras_present(void)
513 {
514 	return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) &
515 		ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED);
516 }
517 
518 /**************************************************************************
519  * Function to identify the presence of FEAT_DIT (Data Independent Timing)
520  *************************************************************************/
521 static inline bool is_armv8_4_feat_dit_present(void)
522 {
523 	return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
524 		ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED);
525 }
526 
527 static inline unsigned int read_feat_tracever_id_field(void)
528 {
529 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEVER);
530 }
531 
532 static inline bool is_feat_sys_reg_trace_supported(void)
533 {
534 	if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_DISABLED) {
535 		return false;
536 	}
537 
538 	if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_ALWAYS) {
539 		return true;
540 	}
541 
542 	return read_feat_tracever_id_field() != 0U;
543 }
544 
545 /*************************************************************************
546  * Function to identify the presence of FEAT_TRF (TraceLift)
547  ************************************************************************/
548 static inline unsigned int read_feat_trf_id_field(void)
549 {
550 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT);
551 }
552 
553 static inline bool is_feat_trf_supported(void)
554 {
555 	if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) {
556 		return false;
557 	}
558 
559 	if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) {
560 		return true;
561 	}
562 
563 	return read_feat_trf_id_field() != 0U;
564 }
565 
566 /********************************************************************************
567  * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization
568  * Support)
569  *******************************************************************************/
570 static inline unsigned int read_feat_nv_id_field(void)
571 {
572 	return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_NV);
573 }
574 
575 static inline bool is_feat_nv2_supported(void)
576 {
577 	if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_DISABLED) {
578 		return false;
579 	}
580 
581 	if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_ALWAYS) {
582 		return true;
583 	}
584 
585 	return read_feat_nv_id_field() >= ID_AA64MMFR2_EL1_NV2_SUPPORTED;
586 }
587 
588 /*******************************************************************************
589  * Function to identify the presence of FEAT_BRBE (Branch Record Buffer
590  * Extension)
591  ******************************************************************************/
592 static inline unsigned int read_feat_brbe_id_field(void)
593 {
594 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE);
595 }
596 
597 static inline bool is_feat_brbe_supported(void)
598 {
599 	if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) {
600 		return false;
601 	}
602 
603 	if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) {
604 		return true;
605 	}
606 
607 	return read_feat_brbe_id_field() != 0U;
608 }
609 
610 /*******************************************************************************
611  * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension)
612  ******************************************************************************/
613 static inline unsigned int read_feat_trbe_id_field(void)
614 {
615 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER);
616 }
617 
618 static inline bool is_feat_trbe_supported(void)
619 {
620 	if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) {
621 		return false;
622 	}
623 
624 	if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) {
625 		return true;
626 	}
627 
628 	return read_feat_trbe_id_field() != 0U;
629 
630 }
631 /*******************************************************************************
632  * Function to identify the presence of FEAT_SMEx (Scalar Matrix Extension)
633  ******************************************************************************/
634 static inline unsigned int read_feat_sme_fa64_id_field(void)
635 {
636 	return ISOLATE_FIELD(read_id_aa64smfr0_el1(), ID_AA64SMFR0_EL1_SME_FA64);
637 }
638 
639 static inline unsigned int read_feat_sme_id_field(void)
640 {
641 	return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_SME);
642 }
643 
644 static inline bool is_feat_sme_supported(void)
645 {
646 	if (ENABLE_SME_FOR_NS == FEAT_STATE_DISABLED) {
647 		return false;
648 	}
649 
650 	if (ENABLE_SME_FOR_NS == FEAT_STATE_ALWAYS) {
651 		return true;
652 	}
653 
654 	return read_feat_sme_id_field() >= ID_AA64PFR1_EL1_SME_SUPPORTED;
655 }
656 
657 #endif /* ARCH_FEATURES_H */
658