1*4e772e6bSLeo Yan/* 2*4e772e6bSLeo Yan * Copyright (c) 2023-2024, Arm Limited. All rights reserved. 3*4e772e6bSLeo Yan * 4*4e772e6bSLeo Yan * SPDX-License-Identifier: BSD-3-Clause 5*4e772e6bSLeo Yan */ 6*4e772e6bSLeo Yan 7*4e772e6bSLeo Yan#define STDOUT_PATH "serial0:38400n8" 8*4e772e6bSLeo Yan#define GIC_CTRL_ADDR 30000000 9*4e772e6bSLeo Yan#define GIC_GICR_OFFSET 0x1000000 10*4e772e6bSLeo Yan#define UART_OFFSET 0x10000 11*4e772e6bSLeo Yan/* 1440x3200@120 framebuffer */ 12*4e772e6bSLeo Yan#define VENCODER_TIMING_CLK 836000000 13*4e772e6bSLeo Yan#define VENCODER_TIMING \ 14*4e772e6bSLeo Yan clock-frequency = <VENCODER_TIMING_CLK>; \ 15*4e772e6bSLeo Yan hactive = <1440>; \ 16*4e772e6bSLeo Yan vactive = <3200>; \ 17*4e772e6bSLeo Yan hfront-porch = <136>; \ 18*4e772e6bSLeo Yan hback-porch = <296>; \ 19*4e772e6bSLeo Yan hsync-len = <160>; \ 20*4e772e6bSLeo Yan vfront-porch = <3>; \ 21*4e772e6bSLeo Yan vback-porch = <217>; \ 22*4e772e6bSLeo Yan vsync-len = <10> 23*4e772e6bSLeo Yan#define ETH_COMPATIBLE "smsc,lan9115" 24*4e772e6bSLeo Yan#define MMC_REMOVABLE non-removable 25