1/* 2 * Copyright (c) 2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <stmm_common.dtsi> 8 9&io_fpga { 10 base-address = <ADDR_INIT(STMM_IOFPGA_BASE)>; 11 pages-count = <PAGE_COUNT(STMM_IOFPGA_SIZE)>; 12 attributes = <SECURE_RW>; 13}; 14 15&system_reg_el0 { 16 base-address = <ADDR_INIT(STMM_SYSREG_BASE)>; 17 pages-count = <PAGE_COUNT(STMM_SYSREG_SIZE)>; 18 attributes = <SECURE_RW>; 19}; 20 21&soc_components { 22 base-address = <ADDR_INIT(STMM_SOCCMP_BASE)>; 23 pages-count = <PAGE_COUNT(STMM_SOCCMP_SIZE)>; 24 attributes = <SECURE_RW>; 25}; 26 27#ifdef STMM_FLASH0_BASE 28&flash0 { 29 base-address = <ADDR_INIT(STMM_FLASH0_BASE)>; 30 pages-count = <PAGE_COUNT(STMM_FLASH0_SIZE)>; 31 attributes = <STMM_FLASH0_ATTR>; 32}; 33#endif 34 35#ifdef STMM_FLASH1_BASE 36&flash1 { 37 base-address = <ADDR_INIT(STMM_FLASH1_BASE)>; 38 pages-count = <PAGE_COUNT(STMM_FLASH1_SIZE)>; 39 attributes = <STMM_FLASH1_ATTR>; }; 40#endif 41 42#ifdef STMM_TPM_S_CRB_BASE 43&tpm_s_crb { 44 base-address = <ADDR_INIT(STMM_TPM_S_CRB_BASE)>; 45 pages-count = <PAGE_COUNT(STMM_TPM_S_CRB_SIZE)>; 46 attributes = <SECURE_RW>; 47}; 48#endif 49 50#ifdef STMM_TPM_NS_CRB_BASE 51&tpm_ns_crb { 52 base-address = <ADDR_INIT(STMM_TPM_NS_CRB_BASE)>; 53 pages-count = <PAGE_COUNT(STMM_TPM_NS_CRB_SIZE)>; 54 attributes = <NON_SECURE_RW>; 55}; 56#endif 57