1*6a9e5ffdSYann Gautier// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2*6a9e5ffdSYann Gautier/* 3*6a9e5ffdSYann Gautier * Copyright (C) STMicroelectronics 2025 - All Rights Reserved 4*6a9e5ffdSYann Gautier * Author: Loic Pallardy loic.pallardy@foss.st.com for STMicroelectronics. 5*6a9e5ffdSYann Gautier */ 6*6a9e5ffdSYann Gautier 7*6a9e5ffdSYann Gautier/* 8*6a9e5ffdSYann Gautier * STM32MP25 Clock tree device tree configuration 9*6a9e5ffdSYann Gautier * Project : open 10*6a9e5ffdSYann Gautier * Generated by XLmx tool version 2.2 - 3/6/2024 11:20:07 AM 11*6a9e5ffdSYann Gautier */ 12*6a9e5ffdSYann Gautier 13*6a9e5ffdSYann Gautier&clk_hse { 14*6a9e5ffdSYann Gautier clock-frequency = <40000000>; 15*6a9e5ffdSYann Gautier}; 16*6a9e5ffdSYann Gautier 17*6a9e5ffdSYann Gautier&clk_hsi { 18*6a9e5ffdSYann Gautier clock-frequency = <64000000>; 19*6a9e5ffdSYann Gautier}; 20*6a9e5ffdSYann Gautier 21*6a9e5ffdSYann Gautier&clk_lse { 22*6a9e5ffdSYann Gautier clock-frequency = <32768>; 23*6a9e5ffdSYann Gautier}; 24*6a9e5ffdSYann Gautier 25*6a9e5ffdSYann Gautier&clk_lsi { 26*6a9e5ffdSYann Gautier clock-frequency = <32000>; 27*6a9e5ffdSYann Gautier}; 28*6a9e5ffdSYann Gautier 29*6a9e5ffdSYann Gautier&clk_msi { 30*6a9e5ffdSYann Gautier clock-frequency = <16000000>; 31*6a9e5ffdSYann Gautier}; 32*6a9e5ffdSYann Gautier 33*6a9e5ffdSYann Gautier&rcc { 34*6a9e5ffdSYann Gautier st,busclk = < 35*6a9e5ffdSYann Gautier DIV_CFG(DIV_LSMCU, 1) 36*6a9e5ffdSYann Gautier DIV_CFG(DIV_APB1, 0) 37*6a9e5ffdSYann Gautier DIV_CFG(DIV_APB2, 0) 38*6a9e5ffdSYann Gautier DIV_CFG(DIV_APB3, 0) 39*6a9e5ffdSYann Gautier DIV_CFG(DIV_APB4, 0) 40*6a9e5ffdSYann Gautier DIV_CFG(DIV_APBDBG, 0) 41*6a9e5ffdSYann Gautier >; 42*6a9e5ffdSYann Gautier 43*6a9e5ffdSYann Gautier st,flexgen = < 44*6a9e5ffdSYann Gautier FLEXGEN_CFG(0, XBAR_SRC_PLL4, 0, 2) 45*6a9e5ffdSYann Gautier FLEXGEN_CFG(1, XBAR_SRC_PLL4, 0, 5) 46*6a9e5ffdSYann Gautier FLEXGEN_CFG(2, XBAR_SRC_PLL4, 0, 1) 47*6a9e5ffdSYann Gautier FLEXGEN_CFG(4, XBAR_SRC_PLL4, 0, 3) 48*6a9e5ffdSYann Gautier FLEXGEN_CFG(5, XBAR_SRC_PLL4, 0, 2) 49*6a9e5ffdSYann Gautier FLEXGEN_CFG(8, XBAR_SRC_HSI_KER, 0, 0) 50*6a9e5ffdSYann Gautier FLEXGEN_CFG(48, XBAR_SRC_PLL5, 0, 3) 51*6a9e5ffdSYann Gautier FLEXGEN_CFG(51, XBAR_SRC_PLL4, 0, 5) 52*6a9e5ffdSYann Gautier FLEXGEN_CFG(52, XBAR_SRC_PLL4, 0, 5) 53*6a9e5ffdSYann Gautier FLEXGEN_CFG(58, XBAR_SRC_HSE_KER, 0, 1) 54*6a9e5ffdSYann Gautier FLEXGEN_CFG(63, XBAR_SRC_PLL4, 0, 2) 55*6a9e5ffdSYann Gautier >; 56*6a9e5ffdSYann Gautier 57*6a9e5ffdSYann Gautier st,kerclk = < 58*6a9e5ffdSYann Gautier MUX_CFG(MUX_USB2PHY1, MUX_USB2PHY1_FLEX57) 59*6a9e5ffdSYann Gautier MUX_CFG(MUX_USB2PHY2, MUX_USB2PHY2_FLEX58) 60*6a9e5ffdSYann Gautier >; 61*6a9e5ffdSYann Gautier 62*6a9e5ffdSYann Gautier pll1: st,pll-1 { 63*6a9e5ffdSYann Gautier st,pll = <&pll1_cfg_1200Mhz>; 64*6a9e5ffdSYann Gautier 65*6a9e5ffdSYann Gautier pll1_cfg_1200Mhz: pll1-cfg-1200Mhz { 66*6a9e5ffdSYann Gautier cfg = <30 1 1 1>; 67*6a9e5ffdSYann Gautier src = <MUX_CFG(MUX_MUXSEL5, MUXSEL_HSE)>; 68*6a9e5ffdSYann Gautier }; 69*6a9e5ffdSYann Gautier }; 70*6a9e5ffdSYann Gautier 71*6a9e5ffdSYann Gautier pll2: st,pll-2 { 72*6a9e5ffdSYann Gautier st,pll = <&pll2_cfg_600Mhz>; 73*6a9e5ffdSYann Gautier 74*6a9e5ffdSYann Gautier pll2_cfg_600Mhz: pll2-cfg-600Mhz { 75*6a9e5ffdSYann Gautier cfg = <30 1 1 2>; 76*6a9e5ffdSYann Gautier src = <MUX_CFG(MUX_MUXSEL6, MUXSEL_HSE)>; 77*6a9e5ffdSYann Gautier }; 78*6a9e5ffdSYann Gautier }; 79*6a9e5ffdSYann Gautier 80*6a9e5ffdSYann Gautier pll4: st,pll-4 { 81*6a9e5ffdSYann Gautier st,pll = <&pll4_cfg_1200Mhz>; 82*6a9e5ffdSYann Gautier 83*6a9e5ffdSYann Gautier pll4_cfg_1200Mhz: pll4-cfg-1200Mhz { 84*6a9e5ffdSYann Gautier cfg = <30 1 1 1>; 85*6a9e5ffdSYann Gautier src = <MUX_CFG(MUX_MUXSEL0, MUXSEL_HSE)>; 86*6a9e5ffdSYann Gautier }; 87*6a9e5ffdSYann Gautier }; 88*6a9e5ffdSYann Gautier 89*6a9e5ffdSYann Gautier pll5: st,pll-5 { 90*6a9e5ffdSYann Gautier st,pll = <&pll5_cfg_532Mhz>; 91*6a9e5ffdSYann Gautier 92*6a9e5ffdSYann Gautier pll5_cfg_532Mhz: pll5-cfg-532Mhz { 93*6a9e5ffdSYann Gautier cfg = <133 5 1 2>; 94*6a9e5ffdSYann Gautier src = <MUX_CFG(MUX_MUXSEL1, MUXSEL_HSE)>; 95*6a9e5ffdSYann Gautier }; 96*6a9e5ffdSYann Gautier }; 97*6a9e5ffdSYann Gautier}; 98