xref: /rk3399_ARM-atf/fdts/stm32mp25-pinctrl.dtsi (revision 06f3c7058c42a9f1a9f7df75ea2de71a000855e8)
1// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
2/*
3 * Copyright (C) 2023-2025, STMicroelectronics - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
9	/omit-if-no-ref/
10	i2c7_pins_a: i2c7-0 {
11		pins1 {
12			pinmux = <STM32_PINMUX('D', 15, AF10)>, /* I2C7_SCL */
13				 <STM32_PINMUX('D', 14, AF10)>; /* I2C7_SDA */
14			bias-disable;
15			drive-open-drain;
16			slew-rate = <0>;
17		};
18	};
19
20	/omit-if-no-ref/
21	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
22		pins1 {
23			pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
24				 <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */
25				 <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
26				 <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */
27				 <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
28			slew-rate = <2>;
29			drive-push-pull;
30			bias-disable;
31		};
32		pins2 {
33			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
34			slew-rate = <3>;
35			drive-push-pull;
36			bias-disable;
37		};
38	};
39
40	/omit-if-no-ref/
41	sdmmc1_b4_pins_b: sdmmc1-b4-1 {
42		pins1 {
43			pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
44				 <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */
45				 <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
46				 <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */
47				 <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
48			slew-rate = <1>;
49			drive-push-pull;
50			bias-disable;
51		};
52		pins2 {
53			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
54			slew-rate = <2>;
55			drive-push-pull;
56			bias-disable;
57		};
58	};
59
60	/omit-if-no-ref/
61	sdmmc2_b4_pins_a: sdmmc2-b4-0 {
62		pins1 {
63			pinmux = <STM32_PINMUX('E', 13, AF12)>, /* SDMMC2_D0 */
64				 <STM32_PINMUX('E', 11, AF12)>, /* SDMMC2_D1 */
65				 <STM32_PINMUX('E', 8, AF12)>, /* SDMMC2_D2 */
66				 <STM32_PINMUX('E', 12, AF12)>, /* SDMMC2_D3 */
67				 <STM32_PINMUX('E', 15, AF12)>; /* SDMMC2_CMD */
68			slew-rate = <1>;
69			drive-push-pull;
70			bias-pull-up;
71		};
72		pins2 {
73			pinmux = <STM32_PINMUX('E', 14, AF12)>; /* SDMMC2_CK */
74			slew-rate = <2>;
75			drive-push-pull;
76			bias-pull-up;
77		};
78	};
79
80	/omit-if-no-ref/
81	sdmmc2_d47_pins_a: sdmmc2-d47-0 {
82		pins {
83			pinmux = <STM32_PINMUX('E', 10, AF12)>, /* SDMMC2_D4 */
84				 <STM32_PINMUX('E', 9, AF12)>, /* SDMMC2_D5 */
85				 <STM32_PINMUX('E', 6, AF12)>, /* SDMMC2_D6 */
86				 <STM32_PINMUX('E', 7, AF12)>; /* SDMMC2_D7 */
87			slew-rate = <1>;
88			drive-push-pull;
89			bias-pull-up;
90		};
91	};
92
93	/omit-if-no-ref/
94	usart2_pins_a: usart2-0 {
95		pins1 {
96			pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
97			bias-disable;
98			drive-push-pull;
99			slew-rate = <0>;
100		};
101		pins2 {
102			pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
103			bias-disable;
104		};
105	};
106};
107