16c1e71e1SYann Gautier// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 26c1e71e1SYann Gautier/* 36c1e71e1SYann Gautier * Copyright (C) STMicroelectronics 2018-2019 - All Rights Reserved 46c1e71e1SYann Gautier * Author: Alexandre Torgue <alexandre.torgue@st.com>. 56c1e71e1SYann Gautier */ 66c1e71e1SYann Gautier 76c1e71e1SYann Gautier/dts-v1/; 86c1e71e1SYann Gautier 96c1e71e1SYann Gautier#include "stm32mp157c.dtsi" 106c1e71e1SYann Gautier#include "stm32mp157cac-pinctrl.dtsi" 116c1e71e1SYann Gautier 126c1e71e1SYann Gautier/ { 136c1e71e1SYann Gautier model = "STMicroelectronics STM32MP157A-DK1 Discovery Board"; 146c1e71e1SYann Gautier compatible = "st,stm32mp157a-dk1", "st,stm32mp157"; 156c1e71e1SYann Gautier 166c1e71e1SYann Gautier aliases { 176c1e71e1SYann Gautier serial0 = &uart4; 18*f237822fSYann Gautier serial1 = &usart3; 19*f237822fSYann Gautier serial2 = &uart7; 206c1e71e1SYann Gautier }; 216c1e71e1SYann Gautier 226c1e71e1SYann Gautier chosen { 236c1e71e1SYann Gautier stdout-path = "serial0:115200n8"; 246c1e71e1SYann Gautier }; 256c1e71e1SYann Gautier 266c1e71e1SYann Gautier}; 276c1e71e1SYann Gautier 286c1e71e1SYann Gautier&clk_hse { 296c1e71e1SYann Gautier st,digbypass; 306c1e71e1SYann Gautier}; 316c1e71e1SYann Gautier 326c1e71e1SYann Gautier&i2c4 { 336c1e71e1SYann Gautier pinctrl-names = "default"; 346c1e71e1SYann Gautier pinctrl-0 = <&i2c4_pins_a>; 356c1e71e1SYann Gautier i2c-scl-rising-time-ns = <185>; 366c1e71e1SYann Gautier i2c-scl-falling-time-ns = <20>; 376c1e71e1SYann Gautier status = "okay"; 386c1e71e1SYann Gautier 396c1e71e1SYann Gautier pmic: stpmic@33 { 406c1e71e1SYann Gautier compatible = "st,stpmic1"; 416c1e71e1SYann Gautier reg = <0x33>; 426c1e71e1SYann Gautier interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>; 436c1e71e1SYann Gautier interrupt-controller; 446c1e71e1SYann Gautier #interrupt-cells = <2>; 456c1e71e1SYann Gautier status = "okay"; 466c1e71e1SYann Gautier 476c1e71e1SYann Gautier st,main-control-register = <0x04>; 486c1e71e1SYann Gautier st,vin-control-register = <0xc0>; 496c1e71e1SYann Gautier st,usb-control-register = <0x20>; 506c1e71e1SYann Gautier 516c1e71e1SYann Gautier regulators { 526c1e71e1SYann Gautier compatible = "st,stpmic1-regulators"; 536c1e71e1SYann Gautier 546c1e71e1SYann Gautier ldo1-supply = <&v3v3>; 556c1e71e1SYann Gautier ldo3-supply = <&vdd_ddr>; 566c1e71e1SYann Gautier ldo6-supply = <&v3v3>; 576c1e71e1SYann Gautier 586c1e71e1SYann Gautier vddcore: buck1 { 596c1e71e1SYann Gautier regulator-name = "vddcore"; 606c1e71e1SYann Gautier regulator-min-microvolt = <1200000>; 616c1e71e1SYann Gautier regulator-max-microvolt = <1350000>; 626c1e71e1SYann Gautier regulator-always-on; 636c1e71e1SYann Gautier regulator-initial-mode = <0>; 646c1e71e1SYann Gautier regulator-over-current-protection; 656c1e71e1SYann Gautier }; 666c1e71e1SYann Gautier 676c1e71e1SYann Gautier vdd_ddr: buck2 { 686c1e71e1SYann Gautier regulator-name = "vdd_ddr"; 696c1e71e1SYann Gautier regulator-min-microvolt = <1350000>; 706c1e71e1SYann Gautier regulator-max-microvolt = <1350000>; 716c1e71e1SYann Gautier regulator-always-on; 726c1e71e1SYann Gautier regulator-initial-mode = <0>; 736c1e71e1SYann Gautier regulator-over-current-protection; 746c1e71e1SYann Gautier }; 756c1e71e1SYann Gautier 766c1e71e1SYann Gautier vdd: buck3 { 776c1e71e1SYann Gautier regulator-name = "vdd"; 786c1e71e1SYann Gautier regulator-min-microvolt = <3300000>; 796c1e71e1SYann Gautier regulator-max-microvolt = <3300000>; 806c1e71e1SYann Gautier regulator-always-on; 816c1e71e1SYann Gautier st,mask-reset; 826c1e71e1SYann Gautier regulator-initial-mode = <0>; 836c1e71e1SYann Gautier regulator-over-current-protection; 846c1e71e1SYann Gautier }; 856c1e71e1SYann Gautier 866c1e71e1SYann Gautier v3v3: buck4 { 876c1e71e1SYann Gautier regulator-name = "v3v3"; 886c1e71e1SYann Gautier regulator-min-microvolt = <3300000>; 896c1e71e1SYann Gautier regulator-max-microvolt = <3300000>; 906c1e71e1SYann Gautier regulator-always-on; 916c1e71e1SYann Gautier regulator-over-current-protection; 926c1e71e1SYann Gautier regulator-initial-mode = <0>; 936c1e71e1SYann Gautier }; 946c1e71e1SYann Gautier 956c1e71e1SYann Gautier v1v8_audio: ldo1 { 966c1e71e1SYann Gautier regulator-name = "v1v8_audio"; 976c1e71e1SYann Gautier regulator-min-microvolt = <1800000>; 986c1e71e1SYann Gautier regulator-max-microvolt = <1800000>; 996c1e71e1SYann Gautier regulator-always-on; 1006c1e71e1SYann Gautier }; 1016c1e71e1SYann Gautier 1026c1e71e1SYann Gautier v3v3_hdmi: ldo2 { 1036c1e71e1SYann Gautier regulator-name = "v3v3_hdmi"; 1046c1e71e1SYann Gautier regulator-min-microvolt = <3300000>; 1056c1e71e1SYann Gautier regulator-max-microvolt = <3300000>; 1066c1e71e1SYann Gautier regulator-always-on; 1076c1e71e1SYann Gautier }; 1086c1e71e1SYann Gautier 1096c1e71e1SYann Gautier vtt_ddr: ldo3 { 1106c1e71e1SYann Gautier regulator-name = "vtt_ddr"; 1116c1e71e1SYann Gautier regulator-min-microvolt = <500000>; 1126c1e71e1SYann Gautier regulator-max-microvolt = <750000>; 1136c1e71e1SYann Gautier regulator-always-on; 1146c1e71e1SYann Gautier regulator-over-current-protection; 1156c1e71e1SYann Gautier }; 1166c1e71e1SYann Gautier 1176c1e71e1SYann Gautier vdd_usb: ldo4 { 1186c1e71e1SYann Gautier regulator-name = "vdd_usb"; 1196c1e71e1SYann Gautier regulator-min-microvolt = <3300000>; 1206c1e71e1SYann Gautier regulator-max-microvolt = <3300000>; 1216c1e71e1SYann Gautier }; 1226c1e71e1SYann Gautier 1236c1e71e1SYann Gautier vdda: ldo5 { 1246c1e71e1SYann Gautier regulator-name = "vdda"; 1256c1e71e1SYann Gautier regulator-min-microvolt = <2900000>; 1266c1e71e1SYann Gautier regulator-max-microvolt = <2900000>; 1276c1e71e1SYann Gautier regulator-boot-on; 1286c1e71e1SYann Gautier }; 1296c1e71e1SYann Gautier 1306c1e71e1SYann Gautier v1v2_hdmi: ldo6 { 1316c1e71e1SYann Gautier regulator-name = "v1v2_hdmi"; 1326c1e71e1SYann Gautier regulator-min-microvolt = <1200000>; 1336c1e71e1SYann Gautier regulator-max-microvolt = <1200000>; 1346c1e71e1SYann Gautier regulator-always-on; 1356c1e71e1SYann Gautier }; 1366c1e71e1SYann Gautier 1376c1e71e1SYann Gautier vref_ddr: vref_ddr { 1386c1e71e1SYann Gautier regulator-name = "vref_ddr"; 1396c1e71e1SYann Gautier regulator-always-on; 1406c1e71e1SYann Gautier regulator-over-current-protection; 1416c1e71e1SYann Gautier }; 1426c1e71e1SYann Gautier }; 1436c1e71e1SYann Gautier }; 1446c1e71e1SYann Gautier}; 1456c1e71e1SYann Gautier 1466c1e71e1SYann Gautier&iwdg2 { 1476c1e71e1SYann Gautier timeout-sec = <32>; 1486c1e71e1SYann Gautier status = "okay"; 1496c1e71e1SYann Gautier}; 1506c1e71e1SYann Gautier 151f33b2433SYann Gautier&pwr { 152f33b2433SYann Gautier pwr-regulators { 153f33b2433SYann Gautier vdd-supply = <&vdd>; 154f33b2433SYann Gautier }; 155f33b2433SYann Gautier}; 156f33b2433SYann Gautier 1576c1e71e1SYann Gautier&rng1 { 1586c1e71e1SYann Gautier status = "okay"; 1596c1e71e1SYann Gautier}; 1606c1e71e1SYann Gautier 1616c1e71e1SYann Gautier&rtc { 1626c1e71e1SYann Gautier status = "okay"; 1636c1e71e1SYann Gautier}; 1646c1e71e1SYann Gautier 1656c1e71e1SYann Gautier&sdmmc1 { 1666c1e71e1SYann Gautier pinctrl-names = "default"; 1676c1e71e1SYann Gautier pinctrl-0 = <&sdmmc1_b4_pins_a>; 1686c1e71e1SYann Gautier broken-cd; 1696c1e71e1SYann Gautier st,neg-edge; 1706c1e71e1SYann Gautier bus-width = <4>; 1716c1e71e1SYann Gautier vmmc-supply = <&v3v3>; 1726c1e71e1SYann Gautier status = "okay"; 1736c1e71e1SYann Gautier}; 1746c1e71e1SYann Gautier 1756c1e71e1SYann Gautier&uart4 { 1766c1e71e1SYann Gautier pinctrl-names = "default"; 1776c1e71e1SYann Gautier pinctrl-0 = <&uart4_pins_a>; 1786c1e71e1SYann Gautier status = "okay"; 1796c1e71e1SYann Gautier}; 1806c1e71e1SYann Gautier 181*f237822fSYann Gautier&uart7 { 182*f237822fSYann Gautier pinctrl-names = "default"; 183*f237822fSYann Gautier pinctrl-0 = <&uart7_pins_a>; 184*f237822fSYann Gautier status = "disabled"; 185*f237822fSYann Gautier}; 186*f237822fSYann Gautier 187*f237822fSYann Gautier&usart3 { 188*f237822fSYann Gautier pinctrl-names = "default"; 189*f237822fSYann Gautier pinctrl-0 = <&usart3_pins_b>; 190*f237822fSYann Gautier status = "disabled"; 191*f237822fSYann Gautier}; 192*f237822fSYann Gautier 1936c1e71e1SYann Gautier/* ATF Specific */ 1946c1e71e1SYann Gautier#include <dt-bindings/clock/stm32mp1-clksrc.h> 1956c1e71e1SYann Gautier#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi" 19683f62c87SYann Gautier#include "stm32mp157c-security.dtsi" 1976c1e71e1SYann Gautier 1986c1e71e1SYann Gautier/ { 1996c1e71e1SYann Gautier aliases { 2006c1e71e1SYann Gautier gpio0 = &gpioa; 2016c1e71e1SYann Gautier gpio1 = &gpiob; 2026c1e71e1SYann Gautier gpio2 = &gpioc; 2036c1e71e1SYann Gautier gpio3 = &gpiod; 2046c1e71e1SYann Gautier gpio4 = &gpioe; 2056c1e71e1SYann Gautier gpio5 = &gpiof; 2066c1e71e1SYann Gautier gpio6 = &gpiog; 2076c1e71e1SYann Gautier gpio7 = &gpioh; 2086c1e71e1SYann Gautier gpio8 = &gpioi; 2096c1e71e1SYann Gautier gpio25 = &gpioz; 2106c1e71e1SYann Gautier i2c3 = &i2c4; 2116c1e71e1SYann Gautier }; 2126c1e71e1SYann Gautier}; 2136c1e71e1SYann Gautier 2146c1e71e1SYann Gautier/* CLOCK init */ 2156c1e71e1SYann Gautier&rcc { 2166c1e71e1SYann Gautier secure-status = "disabled"; 2176c1e71e1SYann Gautier st,clksrc = < 2186c1e71e1SYann Gautier CLK_MPU_PLL1P 2196c1e71e1SYann Gautier CLK_AXI_PLL2P 220b053a22eSYann Gautier CLK_MCU_PLL3P 2216c1e71e1SYann Gautier CLK_PLL12_HSE 2226c1e71e1SYann Gautier CLK_PLL3_HSE 2236c1e71e1SYann Gautier CLK_PLL4_HSE 2246c1e71e1SYann Gautier CLK_RTC_LSE 2256c1e71e1SYann Gautier CLK_MCO1_DISABLED 2266c1e71e1SYann Gautier CLK_MCO2_DISABLED 2276c1e71e1SYann Gautier >; 2286c1e71e1SYann Gautier 2296c1e71e1SYann Gautier st,clkdiv = < 2306c1e71e1SYann Gautier 1 /*MPU*/ 2316c1e71e1SYann Gautier 0 /*AXI*/ 232b053a22eSYann Gautier 0 /*MCU*/ 2336c1e71e1SYann Gautier 1 /*APB1*/ 2346c1e71e1SYann Gautier 1 /*APB2*/ 2356c1e71e1SYann Gautier 1 /*APB3*/ 2366c1e71e1SYann Gautier 1 /*APB4*/ 2376c1e71e1SYann Gautier 2 /*APB5*/ 2386c1e71e1SYann Gautier 23 /*RTC*/ 2396c1e71e1SYann Gautier 0 /*MCO1*/ 2406c1e71e1SYann Gautier 0 /*MCO2*/ 2416c1e71e1SYann Gautier >; 2426c1e71e1SYann Gautier 2436c1e71e1SYann Gautier st,pkcs = < 2446c1e71e1SYann Gautier CLK_CKPER_HSE 2456c1e71e1SYann Gautier CLK_FMC_ACLK 2466c1e71e1SYann Gautier CLK_QSPI_ACLK 2476c1e71e1SYann Gautier CLK_ETH_DISABLED 2486c1e71e1SYann Gautier CLK_SDMMC12_PLL4P 2496c1e71e1SYann Gautier CLK_DSI_DSIPLL 2506c1e71e1SYann Gautier CLK_STGEN_HSE 2516c1e71e1SYann Gautier CLK_USBPHY_HSE 2526c1e71e1SYann Gautier CLK_SPI2S1_PLL3Q 2536c1e71e1SYann Gautier CLK_SPI2S23_PLL3Q 2546c1e71e1SYann Gautier CLK_SPI45_HSI 2556c1e71e1SYann Gautier CLK_SPI6_HSI 2566c1e71e1SYann Gautier CLK_I2C46_HSI 2576c1e71e1SYann Gautier CLK_SDMMC3_PLL4P 2586c1e71e1SYann Gautier CLK_USBO_USBPHY 2596c1e71e1SYann Gautier CLK_ADC_CKPER 2606c1e71e1SYann Gautier CLK_CEC_LSE 2616c1e71e1SYann Gautier CLK_I2C12_HSI 2626c1e71e1SYann Gautier CLK_I2C35_HSI 2636c1e71e1SYann Gautier CLK_UART1_HSI 2646c1e71e1SYann Gautier CLK_UART24_HSI 2656c1e71e1SYann Gautier CLK_UART35_HSI 2666c1e71e1SYann Gautier CLK_UART6_HSI 2676c1e71e1SYann Gautier CLK_UART78_HSI 2686c1e71e1SYann Gautier CLK_SPDIF_PLL4P 2696c1e71e1SYann Gautier CLK_FDCAN_PLL4Q 2706c1e71e1SYann Gautier CLK_SAI1_PLL3Q 2716c1e71e1SYann Gautier CLK_SAI2_PLL3Q 2726c1e71e1SYann Gautier CLK_SAI3_PLL3Q 2736c1e71e1SYann Gautier CLK_SAI4_PLL3Q 2746c1e71e1SYann Gautier CLK_RNG1_LSI 2756c1e71e1SYann Gautier CLK_RNG2_LSI 2766c1e71e1SYann Gautier CLK_LPTIM1_PCLK1 2776c1e71e1SYann Gautier CLK_LPTIM23_PCLK3 2786c1e71e1SYann Gautier CLK_LPTIM45_LSE 2796c1e71e1SYann Gautier >; 2806c1e71e1SYann Gautier 2816c1e71e1SYann Gautier /* VCO = 1300.0 MHz => P = 650 (CPU) */ 2826c1e71e1SYann Gautier pll1: st,pll@0 { 2836c1e71e1SYann Gautier cfg = < 2 80 0 0 0 PQR(1,0,0) >; 2846c1e71e1SYann Gautier frac = < 0x800 >; 2856c1e71e1SYann Gautier }; 2866c1e71e1SYann Gautier 2876c1e71e1SYann Gautier /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */ 2886c1e71e1SYann Gautier pll2: st,pll@1 { 2896c1e71e1SYann Gautier cfg = < 2 65 1 0 0 PQR(1,1,1) >; 2906c1e71e1SYann Gautier frac = < 0x1400 >; 2916c1e71e1SYann Gautier }; 2926c1e71e1SYann Gautier 2936c1e71e1SYann Gautier /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */ 2946c1e71e1SYann Gautier pll3: st,pll@2 { 2956c1e71e1SYann Gautier cfg = < 1 33 1 16 36 PQR(1,1,1) >; 2966c1e71e1SYann Gautier frac = < 0x1a04 >; 2976c1e71e1SYann Gautier }; 2986c1e71e1SYann Gautier 2996c1e71e1SYann Gautier /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */ 3006c1e71e1SYann Gautier pll4: st,pll@3 { 3016c1e71e1SYann Gautier cfg = < 3 98 5 7 7 PQR(1,1,1) >; 3026c1e71e1SYann Gautier }; 3036c1e71e1SYann Gautier}; 304*f237822fSYann Gautier 305*f237822fSYann Gautier&bsec { 306*f237822fSYann Gautier board_id: board_id@ec { 307*f237822fSYann Gautier reg = <0xec 0x4>; 308*f237822fSYann Gautier status = "okay"; 309*f237822fSYann Gautier secure-status = "okay"; 310*f237822fSYann Gautier }; 311*f237822fSYann Gautier}; 312