xref: /rk3399_ARM-atf/fdts/stm32mp157a-dk1.dts (revision 6c1e71e1a13c486c524fdf46490b922cad3f088a)
1*6c1e71e1SYann Gautier// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2*6c1e71e1SYann Gautier/*
3*6c1e71e1SYann Gautier * Copyright (C) STMicroelectronics 2018-2019 - All Rights Reserved
4*6c1e71e1SYann Gautier * Author: Alexandre Torgue <alexandre.torgue@st.com>.
5*6c1e71e1SYann Gautier */
6*6c1e71e1SYann Gautier
7*6c1e71e1SYann Gautier/dts-v1/;
8*6c1e71e1SYann Gautier
9*6c1e71e1SYann Gautier#include "stm32mp157c.dtsi"
10*6c1e71e1SYann Gautier#include "stm32mp157cac-pinctrl.dtsi"
11*6c1e71e1SYann Gautier
12*6c1e71e1SYann Gautier/ {
13*6c1e71e1SYann Gautier	model = "STMicroelectronics STM32MP157A-DK1 Discovery Board";
14*6c1e71e1SYann Gautier	compatible = "st,stm32mp157a-dk1", "st,stm32mp157";
15*6c1e71e1SYann Gautier
16*6c1e71e1SYann Gautier	aliases {
17*6c1e71e1SYann Gautier		serial0 = &uart4;
18*6c1e71e1SYann Gautier	};
19*6c1e71e1SYann Gautier
20*6c1e71e1SYann Gautier	chosen {
21*6c1e71e1SYann Gautier		stdout-path = "serial0:115200n8";
22*6c1e71e1SYann Gautier	};
23*6c1e71e1SYann Gautier
24*6c1e71e1SYann Gautier};
25*6c1e71e1SYann Gautier
26*6c1e71e1SYann Gautier&clk_hse {
27*6c1e71e1SYann Gautier	st,digbypass;
28*6c1e71e1SYann Gautier};
29*6c1e71e1SYann Gautier
30*6c1e71e1SYann Gautier&i2c4 {
31*6c1e71e1SYann Gautier	pinctrl-names = "default";
32*6c1e71e1SYann Gautier	pinctrl-0 = <&i2c4_pins_a>;
33*6c1e71e1SYann Gautier	i2c-scl-rising-time-ns = <185>;
34*6c1e71e1SYann Gautier	i2c-scl-falling-time-ns = <20>;
35*6c1e71e1SYann Gautier	status = "okay";
36*6c1e71e1SYann Gautier
37*6c1e71e1SYann Gautier	pmic: stpmic@33 {
38*6c1e71e1SYann Gautier		compatible = "st,stpmic1";
39*6c1e71e1SYann Gautier		reg = <0x33>;
40*6c1e71e1SYann Gautier		interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
41*6c1e71e1SYann Gautier		interrupt-controller;
42*6c1e71e1SYann Gautier		#interrupt-cells = <2>;
43*6c1e71e1SYann Gautier		status = "okay";
44*6c1e71e1SYann Gautier
45*6c1e71e1SYann Gautier		st,main-control-register = <0x04>;
46*6c1e71e1SYann Gautier		st,vin-control-register = <0xc0>;
47*6c1e71e1SYann Gautier		st,usb-control-register = <0x20>;
48*6c1e71e1SYann Gautier
49*6c1e71e1SYann Gautier		regulators {
50*6c1e71e1SYann Gautier			compatible = "st,stpmic1-regulators";
51*6c1e71e1SYann Gautier
52*6c1e71e1SYann Gautier			ldo1-supply = <&v3v3>;
53*6c1e71e1SYann Gautier			ldo3-supply = <&vdd_ddr>;
54*6c1e71e1SYann Gautier			ldo6-supply = <&v3v3>;
55*6c1e71e1SYann Gautier
56*6c1e71e1SYann Gautier			vddcore: buck1 {
57*6c1e71e1SYann Gautier				regulator-name = "vddcore";
58*6c1e71e1SYann Gautier				regulator-min-microvolt = <1200000>;
59*6c1e71e1SYann Gautier				regulator-max-microvolt = <1350000>;
60*6c1e71e1SYann Gautier				regulator-always-on;
61*6c1e71e1SYann Gautier				regulator-initial-mode = <0>;
62*6c1e71e1SYann Gautier				regulator-over-current-protection;
63*6c1e71e1SYann Gautier			};
64*6c1e71e1SYann Gautier
65*6c1e71e1SYann Gautier			vdd_ddr: buck2 {
66*6c1e71e1SYann Gautier				regulator-name = "vdd_ddr";
67*6c1e71e1SYann Gautier				regulator-min-microvolt = <1350000>;
68*6c1e71e1SYann Gautier				regulator-max-microvolt = <1350000>;
69*6c1e71e1SYann Gautier				regulator-always-on;
70*6c1e71e1SYann Gautier				regulator-initial-mode = <0>;
71*6c1e71e1SYann Gautier				regulator-over-current-protection;
72*6c1e71e1SYann Gautier			};
73*6c1e71e1SYann Gautier
74*6c1e71e1SYann Gautier			vdd: buck3 {
75*6c1e71e1SYann Gautier				regulator-name = "vdd";
76*6c1e71e1SYann Gautier				regulator-min-microvolt = <3300000>;
77*6c1e71e1SYann Gautier				regulator-max-microvolt = <3300000>;
78*6c1e71e1SYann Gautier				regulator-always-on;
79*6c1e71e1SYann Gautier				st,mask-reset;
80*6c1e71e1SYann Gautier				regulator-initial-mode = <0>;
81*6c1e71e1SYann Gautier				regulator-over-current-protection;
82*6c1e71e1SYann Gautier			};
83*6c1e71e1SYann Gautier
84*6c1e71e1SYann Gautier			v3v3: buck4 {
85*6c1e71e1SYann Gautier				regulator-name = "v3v3";
86*6c1e71e1SYann Gautier				regulator-min-microvolt = <3300000>;
87*6c1e71e1SYann Gautier				regulator-max-microvolt = <3300000>;
88*6c1e71e1SYann Gautier				regulator-always-on;
89*6c1e71e1SYann Gautier				regulator-over-current-protection;
90*6c1e71e1SYann Gautier				regulator-initial-mode = <0>;
91*6c1e71e1SYann Gautier			};
92*6c1e71e1SYann Gautier
93*6c1e71e1SYann Gautier			v1v8_audio: ldo1 {
94*6c1e71e1SYann Gautier				regulator-name = "v1v8_audio";
95*6c1e71e1SYann Gautier				regulator-min-microvolt = <1800000>;
96*6c1e71e1SYann Gautier				regulator-max-microvolt = <1800000>;
97*6c1e71e1SYann Gautier				regulator-always-on;
98*6c1e71e1SYann Gautier			};
99*6c1e71e1SYann Gautier
100*6c1e71e1SYann Gautier			v3v3_hdmi: ldo2 {
101*6c1e71e1SYann Gautier				regulator-name = "v3v3_hdmi";
102*6c1e71e1SYann Gautier				regulator-min-microvolt = <3300000>;
103*6c1e71e1SYann Gautier				regulator-max-microvolt = <3300000>;
104*6c1e71e1SYann Gautier				regulator-always-on;
105*6c1e71e1SYann Gautier			};
106*6c1e71e1SYann Gautier
107*6c1e71e1SYann Gautier			vtt_ddr: ldo3 {
108*6c1e71e1SYann Gautier				regulator-name = "vtt_ddr";
109*6c1e71e1SYann Gautier				regulator-min-microvolt = <500000>;
110*6c1e71e1SYann Gautier				regulator-max-microvolt = <750000>;
111*6c1e71e1SYann Gautier				regulator-always-on;
112*6c1e71e1SYann Gautier				regulator-over-current-protection;
113*6c1e71e1SYann Gautier			};
114*6c1e71e1SYann Gautier
115*6c1e71e1SYann Gautier			vdd_usb: ldo4 {
116*6c1e71e1SYann Gautier				regulator-name = "vdd_usb";
117*6c1e71e1SYann Gautier				regulator-min-microvolt = <3300000>;
118*6c1e71e1SYann Gautier				regulator-max-microvolt = <3300000>;
119*6c1e71e1SYann Gautier			};
120*6c1e71e1SYann Gautier
121*6c1e71e1SYann Gautier			vdda: ldo5 {
122*6c1e71e1SYann Gautier				regulator-name = "vdda";
123*6c1e71e1SYann Gautier				regulator-min-microvolt = <2900000>;
124*6c1e71e1SYann Gautier				regulator-max-microvolt = <2900000>;
125*6c1e71e1SYann Gautier				regulator-boot-on;
126*6c1e71e1SYann Gautier			};
127*6c1e71e1SYann Gautier
128*6c1e71e1SYann Gautier			v1v2_hdmi: ldo6 {
129*6c1e71e1SYann Gautier				regulator-name = "v1v2_hdmi";
130*6c1e71e1SYann Gautier				regulator-min-microvolt = <1200000>;
131*6c1e71e1SYann Gautier				regulator-max-microvolt = <1200000>;
132*6c1e71e1SYann Gautier				regulator-always-on;
133*6c1e71e1SYann Gautier			};
134*6c1e71e1SYann Gautier
135*6c1e71e1SYann Gautier			vref_ddr: vref_ddr {
136*6c1e71e1SYann Gautier				regulator-name = "vref_ddr";
137*6c1e71e1SYann Gautier				regulator-always-on;
138*6c1e71e1SYann Gautier				regulator-over-current-protection;
139*6c1e71e1SYann Gautier			};
140*6c1e71e1SYann Gautier		};
141*6c1e71e1SYann Gautier	};
142*6c1e71e1SYann Gautier};
143*6c1e71e1SYann Gautier
144*6c1e71e1SYann Gautier&iwdg2 {
145*6c1e71e1SYann Gautier	timeout-sec = <32>;
146*6c1e71e1SYann Gautier	status = "okay";
147*6c1e71e1SYann Gautier};
148*6c1e71e1SYann Gautier
149*6c1e71e1SYann Gautier&rng1 {
150*6c1e71e1SYann Gautier	status = "okay";
151*6c1e71e1SYann Gautier};
152*6c1e71e1SYann Gautier
153*6c1e71e1SYann Gautier&rtc {
154*6c1e71e1SYann Gautier	status = "okay";
155*6c1e71e1SYann Gautier};
156*6c1e71e1SYann Gautier
157*6c1e71e1SYann Gautier&sdmmc1 {
158*6c1e71e1SYann Gautier	pinctrl-names = "default";
159*6c1e71e1SYann Gautier	pinctrl-0 = <&sdmmc1_b4_pins_a>;
160*6c1e71e1SYann Gautier	broken-cd;
161*6c1e71e1SYann Gautier	st,neg-edge;
162*6c1e71e1SYann Gautier	bus-width = <4>;
163*6c1e71e1SYann Gautier	vmmc-supply = <&v3v3>;
164*6c1e71e1SYann Gautier	status = "okay";
165*6c1e71e1SYann Gautier};
166*6c1e71e1SYann Gautier
167*6c1e71e1SYann Gautier&uart4 {
168*6c1e71e1SYann Gautier	pinctrl-names = "default";
169*6c1e71e1SYann Gautier	pinctrl-0 = <&uart4_pins_a>;
170*6c1e71e1SYann Gautier	status = "okay";
171*6c1e71e1SYann Gautier};
172*6c1e71e1SYann Gautier
173*6c1e71e1SYann Gautier/* ATF Specific */
174*6c1e71e1SYann Gautier#include <dt-bindings/clock/stm32mp1-clksrc.h>
175*6c1e71e1SYann Gautier#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
176*6c1e71e1SYann Gautier
177*6c1e71e1SYann Gautier/ {
178*6c1e71e1SYann Gautier	aliases {
179*6c1e71e1SYann Gautier		gpio0 = &gpioa;
180*6c1e71e1SYann Gautier		gpio1 = &gpiob;
181*6c1e71e1SYann Gautier		gpio2 = &gpioc;
182*6c1e71e1SYann Gautier		gpio3 = &gpiod;
183*6c1e71e1SYann Gautier		gpio4 = &gpioe;
184*6c1e71e1SYann Gautier		gpio5 = &gpiof;
185*6c1e71e1SYann Gautier		gpio6 = &gpiog;
186*6c1e71e1SYann Gautier		gpio7 = &gpioh;
187*6c1e71e1SYann Gautier		gpio8 = &gpioi;
188*6c1e71e1SYann Gautier		gpio25 = &gpioz;
189*6c1e71e1SYann Gautier		i2c3 = &i2c4;
190*6c1e71e1SYann Gautier	};
191*6c1e71e1SYann Gautier
192*6c1e71e1SYann Gautier	soc {
193*6c1e71e1SYann Gautier		stgen: stgen@5C008000 {
194*6c1e71e1SYann Gautier			compatible = "st,stm32-stgen";
195*6c1e71e1SYann Gautier			reg = <0x5C008000 0x1000>;
196*6c1e71e1SYann Gautier			status = "okay";
197*6c1e71e1SYann Gautier		};
198*6c1e71e1SYann Gautier	};
199*6c1e71e1SYann Gautier};
200*6c1e71e1SYann Gautier
201*6c1e71e1SYann Gautier/* CLOCK init */
202*6c1e71e1SYann Gautier&rcc {
203*6c1e71e1SYann Gautier	secure-status = "disabled";
204*6c1e71e1SYann Gautier	st,clksrc = <
205*6c1e71e1SYann Gautier		CLK_MPU_PLL1P
206*6c1e71e1SYann Gautier		CLK_AXI_PLL2P
207*6c1e71e1SYann Gautier		CLK_PLL12_HSE
208*6c1e71e1SYann Gautier		CLK_PLL3_HSE
209*6c1e71e1SYann Gautier		CLK_PLL4_HSE
210*6c1e71e1SYann Gautier		CLK_RTC_LSE
211*6c1e71e1SYann Gautier		CLK_MCO1_DISABLED
212*6c1e71e1SYann Gautier		CLK_MCO2_DISABLED
213*6c1e71e1SYann Gautier	>;
214*6c1e71e1SYann Gautier
215*6c1e71e1SYann Gautier	st,clkdiv = <
216*6c1e71e1SYann Gautier		1 /*MPU*/
217*6c1e71e1SYann Gautier		0 /*AXI*/
218*6c1e71e1SYann Gautier		1 /*APB1*/
219*6c1e71e1SYann Gautier		1 /*APB2*/
220*6c1e71e1SYann Gautier		1 /*APB3*/
221*6c1e71e1SYann Gautier		1 /*APB4*/
222*6c1e71e1SYann Gautier		2 /*APB5*/
223*6c1e71e1SYann Gautier		23 /*RTC*/
224*6c1e71e1SYann Gautier		0 /*MCO1*/
225*6c1e71e1SYann Gautier		0 /*MCO2*/
226*6c1e71e1SYann Gautier	>;
227*6c1e71e1SYann Gautier
228*6c1e71e1SYann Gautier	st,pkcs = <
229*6c1e71e1SYann Gautier		CLK_CKPER_HSE
230*6c1e71e1SYann Gautier		CLK_FMC_ACLK
231*6c1e71e1SYann Gautier		CLK_QSPI_ACLK
232*6c1e71e1SYann Gautier		CLK_ETH_DISABLED
233*6c1e71e1SYann Gautier		CLK_SDMMC12_PLL4P
234*6c1e71e1SYann Gautier		CLK_DSI_DSIPLL
235*6c1e71e1SYann Gautier		CLK_STGEN_HSE
236*6c1e71e1SYann Gautier		CLK_USBPHY_HSE
237*6c1e71e1SYann Gautier		CLK_SPI2S1_PLL3Q
238*6c1e71e1SYann Gautier		CLK_SPI2S23_PLL3Q
239*6c1e71e1SYann Gautier		CLK_SPI45_HSI
240*6c1e71e1SYann Gautier		CLK_SPI6_HSI
241*6c1e71e1SYann Gautier		CLK_I2C46_HSI
242*6c1e71e1SYann Gautier		CLK_SDMMC3_PLL4P
243*6c1e71e1SYann Gautier		CLK_USBO_USBPHY
244*6c1e71e1SYann Gautier		CLK_ADC_CKPER
245*6c1e71e1SYann Gautier		CLK_CEC_LSE
246*6c1e71e1SYann Gautier		CLK_I2C12_HSI
247*6c1e71e1SYann Gautier		CLK_I2C35_HSI
248*6c1e71e1SYann Gautier		CLK_UART1_HSI
249*6c1e71e1SYann Gautier		CLK_UART24_HSI
250*6c1e71e1SYann Gautier		CLK_UART35_HSI
251*6c1e71e1SYann Gautier		CLK_UART6_HSI
252*6c1e71e1SYann Gautier		CLK_UART78_HSI
253*6c1e71e1SYann Gautier		CLK_SPDIF_PLL4P
254*6c1e71e1SYann Gautier		CLK_FDCAN_PLL4Q
255*6c1e71e1SYann Gautier		CLK_SAI1_PLL3Q
256*6c1e71e1SYann Gautier		CLK_SAI2_PLL3Q
257*6c1e71e1SYann Gautier		CLK_SAI3_PLL3Q
258*6c1e71e1SYann Gautier		CLK_SAI4_PLL3Q
259*6c1e71e1SYann Gautier		CLK_RNG1_LSI
260*6c1e71e1SYann Gautier		CLK_RNG2_LSI
261*6c1e71e1SYann Gautier		CLK_LPTIM1_PCLK1
262*6c1e71e1SYann Gautier		CLK_LPTIM23_PCLK3
263*6c1e71e1SYann Gautier		CLK_LPTIM45_LSE
264*6c1e71e1SYann Gautier	>;
265*6c1e71e1SYann Gautier
266*6c1e71e1SYann Gautier	/* VCO = 1300.0 MHz => P = 650 (CPU) */
267*6c1e71e1SYann Gautier	pll1: st,pll@0 {
268*6c1e71e1SYann Gautier		cfg = < 2 80 0 0 0 PQR(1,0,0) >;
269*6c1e71e1SYann Gautier		frac = < 0x800 >;
270*6c1e71e1SYann Gautier	};
271*6c1e71e1SYann Gautier
272*6c1e71e1SYann Gautier	/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
273*6c1e71e1SYann Gautier	pll2: st,pll@1 {
274*6c1e71e1SYann Gautier		cfg = < 2 65 1 0 0 PQR(1,1,1) >;
275*6c1e71e1SYann Gautier		frac = < 0x1400 >;
276*6c1e71e1SYann Gautier	};
277*6c1e71e1SYann Gautier
278*6c1e71e1SYann Gautier	/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
279*6c1e71e1SYann Gautier	pll3: st,pll@2 {
280*6c1e71e1SYann Gautier		cfg = < 1 33 1 16 36 PQR(1,1,1) >;
281*6c1e71e1SYann Gautier		frac = < 0x1a04 >;
282*6c1e71e1SYann Gautier	};
283*6c1e71e1SYann Gautier
284*6c1e71e1SYann Gautier	/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
285*6c1e71e1SYann Gautier	pll4: st,pll@3 {
286*6c1e71e1SYann Gautier		cfg = < 3 98 5 7 7 PQR(1,1,1) >;
287*6c1e71e1SYann Gautier	};
288*6c1e71e1SYann Gautier};
289