1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright (C) STMicroelectronics 2020-2022 - All Rights Reserved 4 */ 5 6/ { 7#if !STM32MP_EMMC && !STM32MP_SDMMC 8 aliases { 9 /delete-property/ mmc0; 10 /delete-property/ mmc1; 11 }; 12#endif 13 14 cpus { 15 /delete-node/ cpu@1; 16 }; 17 18 /delete-node/ psci; 19 20 soc { 21 /delete-node/ timer@40006000; 22 /delete-node/ timer@44006000; 23#if !STM32MP_USB_PROGRAMMER 24 /delete-node/ usb-otg@49000000; 25#endif 26 /delete-node/ pwr_mcu@50001014; 27 /delete-node/ cryp@54001000; 28 /delete-node/ rng@54003000; 29#if !STM32MP_RAW_NAND 30 /delete-node/ memory-controller@58002000; 31#endif 32#if !STM32MP_SPI_NAND && !STM32MP_SPI_NOR 33 /delete-node/ spi@58003000; 34#endif 35#if !STM32MP_EMMC && !STM32MP_SDMMC 36 /delete-node/ mmc@58005000; 37 /delete-node/ mmc@58007000; 38#endif 39#if !STM32MP_USB_PROGRAMMER 40 /delete-node/ usbphyc@5a006000; 41#endif 42 /delete-node/ spi@5c001000; 43 /delete-node/ rtc@5c004000; 44 /delete-node/ etzpc@5c007000; 45 /delete-node/ stgen@5c008000; 46 /delete-node/ i2c@5c009000; 47 /delete-node/ tamp@5c00a000; 48 49 pinctrl@50002000 { 50#if !STM32MP_RAW_NAND 51 /delete-node/ fmc-0; 52#endif 53#if !STM32MP_SPI_NAND && !STM32MP_SPI_NOR 54 /delete-node/ qspi-clk-0; 55 /delete-node/ qspi-bk1-0; 56 /delete-node/ qspi-bk2-0; 57#endif 58#if !STM32MP_EMMC && !STM32MP_SDMMC 59 /delete-node/ sdmmc1-b4-0; 60 /delete-node/ sdmmc1-dir-0; 61 /delete-node/ sdmmc2-b4-0; 62 /delete-node/ sdmmc2-b4-1; 63 /delete-node/ sdmmc2-d47-0; 64#endif 65#if !STM32MP_USB_PROGRAMMER 66 /delete-node/ usbotg_hs-0; 67 /delete-node/ usbotg-fs-dp-dm-0; 68#endif 69 }; 70 }; 71 72 /* 73 * UUID's here are UUID RFC 4122 compliant meaning fieds are stored in 74 * network order (big endian) 75 */ 76 77 st-io_policies { 78 fip-handles { 79 compatible = "st,io-fip-handle"; 80 fw_cfg_uuid = "5807e16a-8459-47be-8ed5-648e8dddab0e"; 81 bl32_uuid = "05d0e189-53dc-1347-8d2b-500a4b7a3e38"; 82 bl32_extra1_uuid = "0b70c29b-2a5a-7840-9f65-0a5682738288"; 83 bl32_extra2_uuid = "8ea87bb1-cfa2-3f4d-85fd-e7bba50220d9"; 84 bl33_uuid = "d6d0eea7-fcea-d54b-9782-9934f234b6e4"; 85 hw_cfg_uuid = "08b8f1d9-c9cf-9349-a962-6fbc6b7265cc"; 86 tos_fw_cfg_uuid = "26257c1a-dbc6-7f47-8d96-c4c4b0248021"; 87#if TRUSTED_BOARD_BOOT 88 stm32mp_cfg_cert_uuid = "501d8dd2-8bce-49a5-84eb-559a9f2eaeaf"; 89 t_key_cert_uuid = "827ee890-f860-e411-a1b4-777a21b4f94c"; 90 tos_fw_key_cert_uuid = "9477d603-fb60-e411-85dd-b7105b8cee04"; 91 nt_fw_key_cert_uuid = "8ad5832a-fb60-e411-8aaf-df30bbc49859"; 92 tos_fw_content_cert_uuid = "a49f4411-5e63-e411-8728-3f05722af33d"; 93 nt_fw_content_cert_uuid = "8ec4c1f3-5d63-e411-a7a9-87ee40b23fa7"; 94#endif 95 }; 96 }; 97 98#if TRUSTED_BOARD_BOOT 99 tb_fw-config { 100 compatible = "arm,tb_fw"; 101 102 /* Disable authentication for development */ 103 disable_auth = <0x0>; 104 105 /* 106 * The following two entries are placeholders for Mbed TLS 107 * heap information. 108 */ 109 mbedtls_heap_addr = <0x0 0x0>; 110 mbedtls_heap_size = <0x0>; 111 }; 112 113#include "stm32mp1-cot-descriptors.dtsi" 114#endif 115}; 116