xref: /rk3399_ARM-atf/fdts/stm32mp13xf.dtsi (revision 3b99ab6e370a01caec14bc5422a86001eaf291b8)
1*3b99ab6eSYann Gautier// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2*3b99ab6eSYann Gautier/*
3*3b99ab6eSYann Gautier * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
4*3b99ab6eSYann Gautier * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5*3b99ab6eSYann Gautier */
6*3b99ab6eSYann Gautier#include "stm32mp13xd.dtsi"
7*3b99ab6eSYann Gautier
8*3b99ab6eSYann Gautier/ {
9*3b99ab6eSYann Gautier	soc {
10*3b99ab6eSYann Gautier		cryp: crypto@54002000 {
11*3b99ab6eSYann Gautier			compatible = "st,stm32mp1-cryp";
12*3b99ab6eSYann Gautier			reg = <0x54002000 0x400>;
13*3b99ab6eSYann Gautier			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
14*3b99ab6eSYann Gautier			clocks = <&rcc CRYP1>;
15*3b99ab6eSYann Gautier			resets = <&rcc CRYP1_R>;
16*3b99ab6eSYann Gautier			status = "disabled";
17*3b99ab6eSYann Gautier		};
18*3b99ab6eSYann Gautier
19*3b99ab6eSYann Gautier		saes: saes@54005000 {
20*3b99ab6eSYann Gautier			compatible = "st,stm32-saes";
21*3b99ab6eSYann Gautier			reg = <0x54005000 0x400>;
22*3b99ab6eSYann Gautier			clocks = <&rcc SAES_K>;
23*3b99ab6eSYann Gautier			resets = <&rcc SAES_R>;
24*3b99ab6eSYann Gautier			status = "disabled";
25*3b99ab6eSYann Gautier		};
26*3b99ab6eSYann Gautier
27*3b99ab6eSYann Gautier		pka: pka@54006000 {
28*3b99ab6eSYann Gautier			compatible = "st,stm32-pka64";
29*3b99ab6eSYann Gautier			reg = <0x54006000 0x2000>;
30*3b99ab6eSYann Gautier			clocks = <&rcc PKA>;
31*3b99ab6eSYann Gautier			resets = <&rcc PKA_R>;
32*3b99ab6eSYann Gautier			status = "disabled";
33*3b99ab6eSYann Gautier		};
34*3b99ab6eSYann Gautier	};
35*3b99ab6eSYann Gautier};
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