1*3b99ab6eSYann Gautier// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2*3b99ab6eSYann Gautier/* 3*3b99ab6eSYann Gautier * Copyright (C) STMicroelectronics 2022 - All Rights Reserved 4*3b99ab6eSYann Gautier * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. 5*3b99ab6eSYann Gautier */ 6*3b99ab6eSYann Gautier 7*3b99ab6eSYann Gautier#include "stm32mp13xa.dtsi" 8*3b99ab6eSYann Gautier 9*3b99ab6eSYann Gautier/ { 10*3b99ab6eSYann Gautier soc { 11*3b99ab6eSYann Gautier cryp: crypto@54002000 { 12*3b99ab6eSYann Gautier compatible = "st,stm32mp1-cryp"; 13*3b99ab6eSYann Gautier reg = <0x54002000 0x400>; 14*3b99ab6eSYann Gautier interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 15*3b99ab6eSYann Gautier clocks = <&rcc CRYP1>; 16*3b99ab6eSYann Gautier resets = <&rcc CRYP1_R>; 17*3b99ab6eSYann Gautier status = "disabled"; 18*3b99ab6eSYann Gautier }; 19*3b99ab6eSYann Gautier 20*3b99ab6eSYann Gautier saes: saes@54005000 { 21*3b99ab6eSYann Gautier compatible = "st,stm32-saes"; 22*3b99ab6eSYann Gautier reg = <0x54005000 0x400>; 23*3b99ab6eSYann Gautier clocks = <&rcc SAES_K>; 24*3b99ab6eSYann Gautier resets = <&rcc SAES_R>; 25*3b99ab6eSYann Gautier status = "disabled"; 26*3b99ab6eSYann Gautier }; 27*3b99ab6eSYann Gautier 28*3b99ab6eSYann Gautier pka: pka@54006000 { 29*3b99ab6eSYann Gautier compatible = "st,stm32-pka64"; 30*3b99ab6eSYann Gautier reg = <0x54006000 0x2000>; 31*3b99ab6eSYann Gautier clocks = <&rcc PKA>; 32*3b99ab6eSYann Gautier resets = <&rcc PKA_R>; 33*3b99ab6eSYann Gautier status = "disabled"; 34*3b99ab6eSYann Gautier }; 35*3b99ab6eSYann Gautier }; 36*3b99ab6eSYann Gautier}; 37