1/* 2 * Copyright (c) 2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#ifndef RD_V3_DEFS_DTSI 8#define RD_V3_DEFS_DTSI 9 10#define CONCAT(x, y) x##y 11#define CONC(x, y) CONCAT(x, y) 12 13#define ADR(n) \ 14 CPU##n:cpu@n##0000 { 15 16#define PRE \ 17 device_type = "cpu"; \ 18 compatible = "arm,armv8"; 19 20#define CPU_0 \ 21 CPU0:cpu@0 { \ 22 PRE \ 23 reg = <0x0 0x0>;\ 24 }; 25 26#define POST }; 27 28/* 29 * n - CPU number 30 */ 31#define CPU(n) \ 32 ADR(n) \ 33 PRE \ 34 reg = <0x0 CONC(0x, CONC(n, 0000))>; \ 35 POST 36 37#endif /* RD_V3_DEFS_DTSI */ 38