143ef4f1eSHarry Liebel/* 22d51b55eSBalint Dobszay * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 343ef4f1eSHarry Liebel * 48d2c4977SAchin Gupta * SPDX-License-Identifier: BSD-3-Clause 543ef4f1eSHarry Liebel */ 643ef4f1eSHarry Liebel 7*003faaa5SAlexei Fedorov/* Configuration: 1 cluster with up to 4 CPUs */ 8*003faaa5SAlexei Fedorov 943ef4f1eSHarry Liebel/dts-v1/; 1043ef4f1eSHarry Liebel 11*003faaa5SAlexei Fedorov#define AFF 12*003faaa5SAlexei Fedorov#define CLUSTER_COUNT 1 13*003faaa5SAlexei Fedorov 14*003faaa5SAlexei Fedorov#include "fvp-defs.dtsi" 15*003faaa5SAlexei Fedorov 1643ef4f1eSHarry Liebel/memreserve/ 0x80000000 0x00010000; 1743ef4f1eSHarry Liebel 1843ef4f1eSHarry Liebel/ { 1943ef4f1eSHarry Liebel}; 2043ef4f1eSHarry Liebel 2143ef4f1eSHarry Liebel/ { 22f2199d95SHarry Liebel model = "FVP Foundation"; 2343ef4f1eSHarry Liebel compatible = "arm,fvp-base", "arm,vexpress"; 2443ef4f1eSHarry Liebel interrupt-parent = <&gic>; 2543ef4f1eSHarry Liebel #address-cells = <2>; 2643ef4f1eSHarry Liebel #size-cells = <2>; 2743ef4f1eSHarry Liebel 2843ef4f1eSHarry Liebel chosen { }; 2943ef4f1eSHarry Liebel 3043ef4f1eSHarry Liebel aliases { 3143ef4f1eSHarry Liebel serial0 = &v2m_serial0; 3243ef4f1eSHarry Liebel serial1 = &v2m_serial1; 3343ef4f1eSHarry Liebel serial2 = &v2m_serial2; 3443ef4f1eSHarry Liebel serial3 = &v2m_serial3; 3543ef4f1eSHarry Liebel }; 3643ef4f1eSHarry Liebel 3743ef4f1eSHarry Liebel psci { 38e8ca7d1eSSoby Mathew compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci"; 3943ef4f1eSHarry Liebel method = "smc"; 4043ef4f1eSHarry Liebel cpu_suspend = <0xc4000001>; 4143ef4f1eSHarry Liebel cpu_off = <0x84000002>; 4243ef4f1eSHarry Liebel cpu_on = <0xc4000003>; 4378c4f192SSoby Mathew sys_poweroff = <0x84000008>; 4478c4f192SSoby Mathew sys_reset = <0x84000009>; 454682461dSMadhukar Pappireddy max-pwr-lvl = <2>; 4643ef4f1eSHarry Liebel }; 4743ef4f1eSHarry Liebel 4843ef4f1eSHarry Liebel cpus { 4943ef4f1eSHarry Liebel #address-cells = <2>; 5043ef4f1eSHarry Liebel #size-cells = <0>; 5143ef4f1eSHarry Liebel 52*003faaa5SAlexei Fedorov CPU_MAP 53bab7bfd2SAchin Gupta 54bab7bfd2SAchin Gupta idle-states { 55bab7bfd2SAchin Gupta entry-method = "arm,psci"; 56bab7bfd2SAchin Gupta 57bab7bfd2SAchin Gupta CPU_SLEEP_0: cpu-sleep-0 { 58bab7bfd2SAchin Gupta compatible = "arm,idle-state"; 596136f372SJuan Castillo local-timer-stop; 606136f372SJuan Castillo arm,psci-suspend-param = <0x0010000>; 61bab7bfd2SAchin Gupta entry-latency-us = <40>; 62bab7bfd2SAchin Gupta exit-latency-us = <100>; 63bab7bfd2SAchin Gupta min-residency-us = <150>; 64bab7bfd2SAchin Gupta }; 65bab7bfd2SAchin Gupta 66bab7bfd2SAchin Gupta CLUSTER_SLEEP_0: cluster-sleep-0 { 67bab7bfd2SAchin Gupta compatible = "arm,idle-state"; 686136f372SJuan Castillo local-timer-stop; 696136f372SJuan Castillo arm,psci-suspend-param = <0x1010000>; 70bab7bfd2SAchin Gupta entry-latency-us = <500>; 71bab7bfd2SAchin Gupta exit-latency-us = <1000>; 72bab7bfd2SAchin Gupta min-residency-us = <2500>; 73bab7bfd2SAchin Gupta }; 74bab7bfd2SAchin Gupta }; 75bab7bfd2SAchin Gupta 76*003faaa5SAlexei Fedorov CPUS 77b1063d95SAntonio Nino Diaz 78b1063d95SAntonio Nino Diaz L2_0: l2-cache0 { 79b1063d95SAntonio Nino Diaz compatible = "cache"; 8043ef4f1eSHarry Liebel }; 8143ef4f1eSHarry Liebel }; 8243ef4f1eSHarry Liebel 8343ef4f1eSHarry Liebel memory@80000000 { 8443ef4f1eSHarry Liebel device_type = "memory"; 85364daf93SJuan Castillo reg = <0x00000000 0x80000000 0 0x7F000000>, 8643ef4f1eSHarry Liebel <0x00000008 0x80000000 0 0x80000000>; 8743ef4f1eSHarry Liebel }; 8843ef4f1eSHarry Liebel 893498859bSHarry Liebel gic: interrupt-controller@2f000000 { 9043ef4f1eSHarry Liebel compatible = "arm,gic-v3"; 9143ef4f1eSHarry Liebel #interrupt-cells = <3>; 923498859bSHarry Liebel #address-cells = <2>; 933498859bSHarry Liebel #size-cells = <2>; 943498859bSHarry Liebel ranges; 9543ef4f1eSHarry Liebel interrupt-controller; 9643ef4f1eSHarry Liebel reg = <0x0 0x2f000000 0 0x10000>, // GICD 9743ef4f1eSHarry Liebel <0x0 0x2f100000 0 0x200000>, // GICR 9843ef4f1eSHarry Liebel <0x0 0x2c000000 0 0x2000>, // GICC 9943ef4f1eSHarry Liebel <0x0 0x2c010000 0 0x2000>, // GICH 1003498859bSHarry Liebel <0x0 0x2c02f000 0 0x2000>; // GICV 10143ef4f1eSHarry Liebel interrupts = <1 9 4>; 1023498859bSHarry Liebel 1033498859bSHarry Liebel its: its@2f020000 { 1043498859bSHarry Liebel compatible = "arm,gic-v3-its"; 1053498859bSHarry Liebel msi-controller; 1063498859bSHarry Liebel reg = <0x0 0x2f020000 0x0 0x20000>; // GITS 1073498859bSHarry Liebel }; 10843ef4f1eSHarry Liebel }; 10943ef4f1eSHarry Liebel 11043ef4f1eSHarry Liebel timer { 11143ef4f1eSHarry Liebel compatible = "arm,armv8-timer"; 11243ef4f1eSHarry Liebel interrupts = <1 13 0xff01>, 11343ef4f1eSHarry Liebel <1 14 0xff01>, 11443ef4f1eSHarry Liebel <1 11 0xff01>, 11543ef4f1eSHarry Liebel <1 10 0xff01>; 11643ef4f1eSHarry Liebel clock-frequency = <100000000>; 11743ef4f1eSHarry Liebel }; 11843ef4f1eSHarry Liebel 11943ef4f1eSHarry Liebel timer@2a810000 { 12043ef4f1eSHarry Liebel compatible = "arm,armv7-timer-mem"; 12143ef4f1eSHarry Liebel reg = <0x0 0x2a810000 0x0 0x10000>; 12243ef4f1eSHarry Liebel clock-frequency = <100000000>; 12343ef4f1eSHarry Liebel #address-cells = <2>; 12443ef4f1eSHarry Liebel #size-cells = <2>; 12543ef4f1eSHarry Liebel ranges; 126f2199d95SHarry Liebel frame@2a830000 { 127f2199d95SHarry Liebel frame-number = <1>; 128f2199d95SHarry Liebel interrupts = <0 26 4>; 129f2199d95SHarry Liebel reg = <0x0 0x2a830000 0x0 0x10000>; 13043ef4f1eSHarry Liebel }; 13143ef4f1eSHarry Liebel }; 13243ef4f1eSHarry Liebel 13343ef4f1eSHarry Liebel pmu { 13443ef4f1eSHarry Liebel compatible = "arm,armv8-pmuv3"; 13543ef4f1eSHarry Liebel interrupts = <0 60 4>, 13643ef4f1eSHarry Liebel <0 61 4>, 13743ef4f1eSHarry Liebel <0 62 4>, 13843ef4f1eSHarry Liebel <0 63 4>; 13943ef4f1eSHarry Liebel }; 14043ef4f1eSHarry Liebel 14143ef4f1eSHarry Liebel smb { 14243ef4f1eSHarry Liebel compatible = "simple-bus"; 14343ef4f1eSHarry Liebel 14443ef4f1eSHarry Liebel #address-cells = <2>; 14543ef4f1eSHarry Liebel #size-cells = <1>; 14643ef4f1eSHarry Liebel ranges = <0 0 0 0x08000000 0x04000000>, 14743ef4f1eSHarry Liebel <1 0 0 0x14000000 0x04000000>, 14843ef4f1eSHarry Liebel <2 0 0 0x18000000 0x04000000>, 14943ef4f1eSHarry Liebel <3 0 0 0x1c000000 0x04000000>, 15043ef4f1eSHarry Liebel <4 0 0 0x0c000000 0x04000000>, 15143ef4f1eSHarry Liebel <5 0 0 0x10000000 0x04000000>; 15243ef4f1eSHarry Liebel 1532d51b55eSBalint Dobszay #include "fvp-foundation-motherboard.dtsi" 15443ef4f1eSHarry Liebel }; 15543ef4f1eSHarry Liebel}; 156