xref: /rk3399_ARM-atf/fdts/fvp-base-gicv3-psci-dynamiq-2t.dts (revision f29d1e0c72e6665ba4c8ab11bad83f59669ea0d9) 
1/*
2 * Copyright (c) 2019-2020, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7/dts-v1/;
8
9#include "fvp-base-gicv3-psci-dynamiq-common.dtsi"
10
11&CPU_MAP {
12	/delete-node/ cluster0;
13
14	cluster0 {
15		core0 {
16			thread0 {
17				cpu = <&CPU0>;
18			};
19			thread1 {
20				cpu = <&CPU1>;
21			};
22		};
23		core1 {
24			thread0 {
25				cpu = <&CPU2>;
26			};
27			thread1 {
28				cpu = <&CPU3>;
29			};
30		};
31		core2 {
32			thread0 {
33				cpu = <&CPU4>;
34			};
35			thread1 {
36				cpu = <&CPU5>;
37			};
38		};
39		core3 {
40			thread0 {
41				cpu = <&CPU6>;
42			};
43			thread1 {
44				cpu = <&CPU7>;
45			};
46		};
47		core4 {
48			thread0 {
49				cpu = <&CPU8>;
50			};
51			thread1 {
52				cpu = <&CPU9>;
53			};
54		};
55		core5 {
56			thread0 {
57				cpu = <&CPU10>;
58			};
59			thread1 {
60				cpu = <&CPU11>;
61			};
62		};
63		core6 {
64			thread0 {
65				cpu = <&CPU12>;
66			};
67			thread1 {
68				cpu = <&CPU13>;
69			};
70		};
71		core7 {
72			thread0 {
73				cpu = <&CPU14>;
74			};
75			thread1 {
76				cpu = <&CPU15>;
77			};
78		};
79	};
80};
81
82/ {
83	cpus {
84		CPU0:cpu@0 {
85			reg = <0x0 0x0>;
86		};
87
88		CPU1:cpu@1 {
89			reg = <0x0 0x1>;
90		};
91
92		CPU2:cpu@2 {
93			reg = <0x0 0x100>;
94		};
95
96		CPU3:cpu@3 {
97			reg = <0x0 0x101>;
98		};
99
100		CPU4:cpu@100 {
101			reg = <0x0 0x200>;
102		};
103
104		CPU5:cpu@101 {
105			reg = <0x0 0x201>;
106		};
107
108		CPU6:cpu@102 {
109			reg = <0x0 0x300>;
110		};
111
112		CPU7:cpu@103 {
113			reg = <0x0 0x301>;
114		};
115
116		CPU8:cpu@200 {
117			device_type = "cpu";
118			compatible = "arm,armv8";
119			reg = <0x0 0x400>;
120			enable-method = "psci";
121			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
122			next-level-cache = <&L2_0>;
123		};
124
125		CPU9:cpu@201 {
126			device_type = "cpu";
127			compatible = "arm,armv8";
128			reg = <0x0 0x401>;
129			enable-method = "psci";
130			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
131			next-level-cache = <&L2_0>;
132		};
133
134		CPU10:cpu@202 {
135			device_type = "cpu";
136			compatible = "arm,armv8";
137			reg = <0x0 0x500>;
138			enable-method = "psci";
139			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
140			next-level-cache = <&L2_0>;
141		};
142
143		CPU11:cpu@203 {
144			device_type = "cpu";
145			compatible = "arm,armv8";
146			reg = <0x0 0x501>;
147			enable-method = "psci";
148			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
149			next-level-cache = <&L2_0>;
150		};
151
152		CPU12:cpu@300 {
153			device_type = "cpu";
154			compatible = "arm,armv8";
155			reg = <0x0 0x600>;
156			enable-method = "psci";
157			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
158			next-level-cache = <&L2_0>;
159		};
160
161		CPU13:cpu@301 {
162			device_type = "cpu";
163			compatible = "arm,armv8";
164			reg = <0x0 0x601>;
165			enable-method = "psci";
166			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
167			next-level-cache = <&L2_0>;
168		};
169
170		CPU14:cpu@302 {
171			device_type = "cpu";
172			compatible = "arm,armv8";
173			reg = <0x0 0x700>;
174			enable-method = "psci";
175			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
176			next-level-cache = <&L2_0>;
177		};
178
179		CPU15:cpu@303 {
180			device_type = "cpu";
181			compatible = "arm,armv8";
182			reg = <0x0 0x701>;
183			enable-method = "psci";
184			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
185			next-level-cache = <&L2_0>;
186		};
187	};
188};
189