xref: /rk3399_ARM-atf/fdts/fvp-base-gicv2.dtsi (revision a9bb1f1731554d738cdee183a2fec911d94010d1)
1a885a7d2SAndre Przywara/*
2*270d5c5cSBoyan Karatotev * Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved.
3a885a7d2SAndre Przywara *
4a885a7d2SAndre Przywara * SPDX-License-Identifier: BSD-3-Clause
5a885a7d2SAndre Przywara */
6a885a7d2SAndre Przywara
7a885a7d2SAndre Przywara/* GICv2 configuration, without V2M */
8a885a7d2SAndre Przywara
9*270d5c5cSBoyan Karatotev#include "fvp-base-gicv23-interrupts.dtsi"
10*270d5c5cSBoyan Karatotev
11a885a7d2SAndre Przywara/ {
12a885a7d2SAndre Przywara	gic: interrupt-controller@2f000000 {
13a885a7d2SAndre Przywara		compatible = "arm,cortex-a15-gic";
14a885a7d2SAndre Przywara		#interrupt-cells = <3>;
15a885a7d2SAndre Przywara		#address-cells = <1>;
16a885a7d2SAndre Przywara		interrupt-controller;
17a885a7d2SAndre Przywara		reg = <0x0 0x2f000000 0 0x10000>,
18a885a7d2SAndre Przywara		      <0x0 0x2c000000 0 0x2000>,
19a885a7d2SAndre Przywara		      <0x0 0x2c010000 0 0x2000>,
20a885a7d2SAndre Przywara		      <0x0 0x2c02F000 0 0x2000>;
21a885a7d2SAndre Przywara		interrupts = <1 9 0xf04>;
22a885a7d2SAndre Przywara	};
23a885a7d2SAndre Przywara};
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