1 /* 2 * Texas Instruments System Control Interface (TISCI) Protocol 3 * 4 * Communication protocol with TI SCI hardware 5 * The system works in a message response protocol 6 * See: http://processors.wiki.ti.com/index.php/TISCI for details 7 * 8 * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/ 9 * 10 * SPDX-License-Identifier: BSD-3-Clause 11 */ 12 13 #ifndef TI_SCI_PROTOCOL_H 14 #define TI_SCI_PROTOCOL_H 15 16 #include <stdint.h> 17 18 /* Generic Messages */ 19 #define TI_SCI_MSG_ENABLE_WDT 0x0000 20 #define TI_SCI_MSG_WAKE_RESET 0x0001 21 #define TI_SCI_MSG_VERSION 0x0002 22 #define TI_SCI_MSG_WAKE_REASON 0x0003 23 #define TI_SCI_MSG_GOODBYE 0x0004 24 #define TI_SCI_MSG_SYS_RESET 0x0005 25 #define TI_SCI_MSG_QUERY_FW_CAPS 0x0022 26 27 /* Device requests */ 28 #define TI_SCI_MSG_SET_DEVICE_STATE 0x0200 29 #define TI_SCI_MSG_GET_DEVICE_STATE 0x0201 30 #define TI_SCI_MSG_SET_DEVICE_RESETS 0x0202 31 32 /* Low Power Mode Requests */ 33 #define TI_SCI_MSG_ENTER_SLEEP 0x0301 34 #define TI_SCI_MSG_LPM_GET_NEXT_SYS_MODE 0x030d 35 36 /* Clock requests */ 37 #define TI_SCI_MSG_SET_CLOCK_STATE 0x0100 38 #define TI_SCI_MSG_GET_CLOCK_STATE 0x0101 39 #define TI_SCI_MSG_SET_CLOCK_PARENT 0x0102 40 #define TI_SCI_MSG_GET_CLOCK_PARENT 0x0103 41 #define TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 0x0104 42 #define TI_SCI_MSG_SET_CLOCK_FREQ 0x010c 43 #define TI_SCI_MSG_QUERY_CLOCK_FREQ 0x010d 44 #define TI_SCI_MSG_GET_CLOCK_FREQ 0x010e 45 46 /* Processor Control Messages */ 47 #define TISCI_MSG_PROC_REQUEST 0xc000 48 #define TISCI_MSG_PROC_RELEASE 0xc001 49 #define TISCI_MSG_PROC_HANDOVER 0xc005 50 #define TISCI_MSG_SET_PROC_BOOT_CONFIG 0xc100 51 #define TISCI_MSG_SET_PROC_BOOT_CTRL 0xc101 52 #define TISCI_MSG_PROC_AUTH_BOOT_IMAGE 0xc120 53 #define TISCI_MSG_GET_PROC_BOOT_STATUS 0xc400 54 #define TISCI_MSG_WAIT_PROC_BOOT_STATUS 0xc401 55 56 /** 57 * struct ti_sci_secure_msg_hdr - Header that prefixes all TISCI messages sent 58 * via secure transport. 59 * @checksum: crc16 checksum for the entire message 60 * @reserved: Reserved for future use. 61 */ 62 struct ti_sci_secure_msg_hdr { 63 uint16_t checksum; 64 uint16_t reserved; 65 } __packed; 66 67 /** 68 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses 69 * @type: Type of messages: One of TI_SCI_MSG* values 70 * @host: Host of the message 71 * @seq: Message identifier indicating a transfer sequence 72 * @flags: Flag for the message 73 */ 74 struct ti_sci_msg_hdr { 75 struct ti_sci_secure_msg_hdr sec_hdr; 76 uint16_t type; 77 uint8_t host; 78 uint8_t seq; 79 #define TI_SCI_MSG_FLAG(val) (1 << (val)) 80 #define TI_SCI_FLAG_REQ_GENERIC_NORESPONSE 0x0 81 #define TI_SCI_FLAG_REQ_ACK_ON_RECEIVED TI_SCI_MSG_FLAG(0) 82 #define TI_SCI_FLAG_REQ_ACK_ON_PROCESSED TI_SCI_MSG_FLAG(1) 83 #define TI_SCI_FLAG_RESP_GENERIC_NACK 0x0 84 #define TI_SCI_FLAG_RESP_GENERIC_ACK TI_SCI_MSG_FLAG(1) 85 /* Additional Flags */ 86 uint32_t flags; 87 } __packed; 88 89 /** 90 * struct ti_sci_msg_version_req - Request for firmware version information 91 * @hdr: Generic header 92 * 93 * Request for TI_SCI_MSG_VERSION 94 */ 95 struct ti_sci_msg_req_version { 96 struct ti_sci_msg_hdr hdr; 97 } __packed; 98 99 /** 100 * struct ti_sci_msg_resp_version - Response for firmware version information 101 * @hdr: Generic header 102 * @firmware_description: String describing the firmware 103 * @firmware_revision: Firmware revision 104 * @abi_major: Major version of the ABI that firmware supports 105 * @abi_minor: Minor version of the ABI that firmware supports 106 * @sub_version: Sub-version number of the firmware 107 * @patch_version: Patch-version number of the firmware. 108 * 109 * In general, ABI version changes follow the rule that minor version increments 110 * are backward compatible. Major revision changes in ABI may not be 111 * backward compatible. 112 * 113 * Response to request TI_SCI_MSG_VERSION 114 */ 115 struct ti_sci_msg_resp_version { 116 struct ti_sci_msg_hdr hdr; 117 #define FIRMWARE_DESCRIPTION_LENGTH 32 118 char firmware_description[FIRMWARE_DESCRIPTION_LENGTH]; 119 uint16_t firmware_revision; 120 uint8_t abi_major; 121 uint8_t abi_minor; 122 uint8_t sub_version; 123 uint8_t patch_version; 124 } __packed; 125 126 /** 127 * struct ti_sci_msg_req_reboot - Reboot the SoC 128 * @hdr: Generic Header 129 * @domain: Domain to be reset, 0 for full SoC reboot 130 * 131 * Request type is TI_SCI_MSG_SYS_RESET, responded with a generic 132 * ACK/NACK message. 133 */ 134 struct ti_sci_msg_req_reboot { 135 struct ti_sci_msg_hdr hdr; 136 #define TI_SCI_DOMAIN_FULL_SOC_RESET 0x0 137 uint8_t domain; 138 } __packed; 139 140 /** 141 * struct ti_sci_msg_resp_query_fw_caps - Response for query firmware caps 142 * @hdr: Generic header 143 * @fw_caps: Each bit in fw_caps indicating one FW/SOC capability 144 * MSG_FLAG_CAPS_GENERIC: Generic capability (LPM not supported) 145 * MSG_FLAG_CAPS_LPM_DEEP_SLEEP: Deep Sleep LPM 146 * MSG_FLAG_CAPS_LPM_MCU_ONLY: MCU only LPM 147 * MSG_FLAG_CAPS_LPM_STANDBY: Standby LPM 148 * MSG_FLAG_CAPS_LPM_PARTIAL_IO: Partial IO in LPM 149 * MSG_FLAG_CAPS_LPM_DM_MANAGED: LPM can be managed by DM 150 * 151 * Response to a generic message with message type TI_SCI_MSG_QUERY_FW_CAPS 152 * providing currently available SOC/firmware capabilities. SoC that don't 153 * support low power modes return only MSG_FLAG_CAPS_GENERIC capability. 154 */ 155 struct ti_sci_msg_resp_query_fw_caps { 156 struct ti_sci_msg_hdr hdr; 157 #define MSG_FLAG_CAPS_GENERIC TI_SCI_MSG_FLAG(0) 158 #define MSG_FLAG_CAPS_LPM_DEEP_SLEEP TI_SCI_MSG_FLAG(1) 159 #define MSG_FLAG_CAPS_LPM_MCU_ONLY TI_SCI_MSG_FLAG(2) 160 #define MSG_FLAG_CAPS_LPM_STANDBY TI_SCI_MSG_FLAG(3) 161 #define MSG_FLAG_CAPS_LPM_PARTIAL_IO TI_SCI_MSG_FLAG(4) 162 #define MSG_FLAG_CAPS_LPM_DM_MANAGED TI_SCI_MSG_FLAG(5) 163 uint64_t fw_caps; 164 } __packed; 165 166 /** 167 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device 168 * @hdr: Generic header 169 * @id: Indicates which device to modify 170 * @reserved: Reserved space in message, must be 0 for backward compatibility 171 * @state: The desired state of the device. 172 * 173 * Certain flags can also be set to alter the device state: 174 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source. 175 * The meaning of this flag will vary slightly from device to device and from 176 * SoC to SoC but it generally allows the device to wake the SoC out of deep 177 * suspend states. 178 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device. 179 * + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed 180 * with STATE_RETENTION or STATE_ON, it will claim the device exclusively. 181 * If another host already has this device set to STATE_RETENTION or STATE_ON, 182 * the message will fail. Once successful, other hosts attempting to set 183 * STATE_RETENTION or STATE_ON will fail. 184 * 185 * Request type is TI_SCI_MSG_SET_DEVICE_STATE, responded with a generic 186 * ACK/NACK message. 187 */ 188 struct ti_sci_msg_req_set_device_state { 189 /* Additional hdr->flags options */ 190 #define MSG_FLAG_DEVICE_WAKE_ENABLED TI_SCI_MSG_FLAG(8) 191 #define MSG_FLAG_DEVICE_RESET_ISO TI_SCI_MSG_FLAG(9) 192 #define MSG_FLAG_DEVICE_EXCLUSIVE TI_SCI_MSG_FLAG(10) 193 struct ti_sci_msg_hdr hdr; 194 uint32_t id; 195 uint32_t reserved; 196 197 #define MSG_DEVICE_SW_STATE_AUTO_OFF 0 198 #define MSG_DEVICE_SW_STATE_RETENTION 1 199 #define MSG_DEVICE_SW_STATE_ON 2 200 uint8_t state; 201 } __packed; 202 203 /** 204 * struct ti_sci_msg_req_get_device_state - Request to get device. 205 * @hdr: Generic header 206 * @id: Device Identifier 207 * 208 * Request type is TI_SCI_MSG_GET_DEVICE_STATE, responded device state 209 * information 210 */ 211 struct ti_sci_msg_req_get_device_state { 212 struct ti_sci_msg_hdr hdr; 213 uint32_t id; 214 } __packed; 215 216 /** 217 * struct ti_sci_msg_resp_get_device_state - Response to get device request. 218 * @hdr: Generic header 219 * @context_loss_count: Indicates how many times the device has lost context. A 220 * driver can use this monotonic counter to determine if the device has 221 * lost context since the last time this message was exchanged. 222 * @resets: Programmed state of the reset lines. 223 * @programmed_state: The state as programmed by set_device. 224 * - Uses the MSG_DEVICE_SW_* macros 225 * @current_state: The actual state of the hardware. 226 * 227 * Response to request TI_SCI_MSG_GET_DEVICE_STATE. 228 */ 229 struct ti_sci_msg_resp_get_device_state { 230 struct ti_sci_msg_hdr hdr; 231 uint32_t context_loss_count; 232 uint32_t resets; 233 uint8_t programmed_state; 234 #define MSG_DEVICE_HW_STATE_OFF 0 235 #define MSG_DEVICE_HW_STATE_ON 1 236 #define MSG_DEVICE_HW_STATE_TRANS 2 237 uint8_t current_state; 238 } __packed; 239 240 /** 241 * struct ti_sci_msg_req_set_device_resets - Set the desired resets 242 * configuration of the device 243 * @hdr: Generic header 244 * @id: Indicates which device to modify 245 * @resets: A bit field of resets for the device. The meaning, behavior, 246 * and usage of the reset flags are device specific. 0 for a bit 247 * indicates releasing the reset represented by that bit while 1 248 * indicates keeping it held. 249 * 250 * Request type is TI_SCI_MSG_SET_DEVICE_RESETS, responded with a generic 251 * ACK/NACK message. 252 */ 253 struct ti_sci_msg_req_set_device_resets { 254 struct ti_sci_msg_hdr hdr; 255 uint32_t id; 256 uint32_t resets; 257 } __packed; 258 259 /** 260 * struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state 261 * @hdr: Generic Header, Certain flags can be set specific to the clocks: 262 * MSG_FLAG_CLOCK_ALLOW_SSC: Allow this clock to be modified 263 * via spread spectrum clocking. 264 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE: Allow this clock's 265 * frequency to be changed while it is running so long as it 266 * is within the min/max limits. 267 * MSG_FLAG_CLOCK_INPUT_TERM: Enable input termination, this 268 * is only applicable to clock inputs on the SoC pseudo-device. 269 * @dev_id: Device identifier this request is for 270 * @clk_id: Clock identifier for the device for this request. 271 * Each device has it's own set of clock inputs. This indexes 272 * which clock input to modify. 273 * @request_state: Request the state for the clock to be set to. 274 * MSG_CLOCK_SW_STATE_UNREQ: The IP does not require this clock, 275 * it can be disabled, regardless of the state of the device 276 * MSG_CLOCK_SW_STATE_AUTO: Allow the System Controller to 277 * automatically manage the state of this clock. If the device 278 * is enabled, then the clock is enabled. If the device is set 279 * to off or retention, then the clock is internally set as not 280 * being required by the device.(default) 281 * MSG_CLOCK_SW_STATE_REQ: Configure the clock to be enabled, 282 * regardless of the state of the device. 283 * 284 * Normally, all required clocks are managed by TISCI entity, this is used 285 * only for specific control *IF* required. Auto managed state is 286 * MSG_CLOCK_SW_STATE_AUTO, in other states, TISCI entity assume remote 287 * will explicitly control. 288 * 289 * Request type is TI_SCI_MSG_SET_CLOCK_STATE, response is a generic 290 * ACK or NACK message. 291 */ 292 struct ti_sci_msg_req_set_clock_state { 293 /* Additional hdr->flags options */ 294 #define MSG_FLAG_CLOCK_ALLOW_SSC TI_SCI_MSG_FLAG(8) 295 #define MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE TI_SCI_MSG_FLAG(9) 296 #define MSG_FLAG_CLOCK_INPUT_TERM TI_SCI_MSG_FLAG(10) 297 struct ti_sci_msg_hdr hdr; 298 uint32_t dev_id; 299 uint8_t clk_id; 300 #define MSG_CLOCK_SW_STATE_UNREQ 0 301 #define MSG_CLOCK_SW_STATE_AUTO 1 302 #define MSG_CLOCK_SW_STATE_REQ 2 303 uint8_t request_state; 304 } __packed; 305 306 /** 307 * struct ti_sci_msg_req_get_clock_state - Request for clock state 308 * @hdr: Generic Header 309 * @dev_id: Device identifier this request is for 310 * @clk_id: Clock identifier for the device for this request. 311 * Each device has it's own set of clock inputs. This indexes 312 * which clock input to get state of. 313 * 314 * Request type is TI_SCI_MSG_GET_CLOCK_STATE, response is state 315 * of the clock 316 */ 317 struct ti_sci_msg_req_get_clock_state { 318 struct ti_sci_msg_hdr hdr; 319 uint32_t dev_id; 320 uint8_t clk_id; 321 } __packed; 322 323 /** 324 * struct ti_sci_msg_resp_get_clock_state - Response to get clock state 325 * @hdr: Generic Header 326 * @programmed_state: Any programmed state of the clock. This is one of 327 * MSG_CLOCK_SW_STATE* values. 328 * @current_state: Current state of the clock. This is one of: 329 * MSG_CLOCK_HW_STATE_NOT_READY: Clock is not ready 330 * MSG_CLOCK_HW_STATE_READY: Clock is ready 331 * 332 * Response to TI_SCI_MSG_GET_CLOCK_STATE. 333 */ 334 struct ti_sci_msg_resp_get_clock_state { 335 struct ti_sci_msg_hdr hdr; 336 uint8_t programmed_state; 337 #define MSG_CLOCK_HW_STATE_NOT_READY 0 338 #define MSG_CLOCK_HW_STATE_READY 1 339 uint8_t current_state; 340 } __packed; 341 342 /** 343 * struct ti_sci_msg_req_set_clock_parent - Set the clock parent 344 * @hdr: Generic Header 345 * @dev_id: Device identifier this request is for 346 * @clk_id: Clock identifier for the device for this request. 347 * Each device has it's own set of clock inputs. This indexes 348 * which clock input to modify. 349 * @parent_id: The new clock parent is selectable by an index via this 350 * parameter. 351 * 352 * Request type is TI_SCI_MSG_SET_CLOCK_PARENT, response is generic 353 * ACK / NACK message. 354 */ 355 struct ti_sci_msg_req_set_clock_parent { 356 struct ti_sci_msg_hdr hdr; 357 uint32_t dev_id; 358 uint8_t clk_id; 359 uint8_t parent_id; 360 } __packed; 361 362 /** 363 * struct ti_sci_msg_req_get_clock_parent - Get the clock parent 364 * @hdr: Generic Header 365 * @dev_id: Device identifier this request is for 366 * @clk_id: Clock identifier for the device for this request. 367 * Each device has it's own set of clock inputs. This indexes 368 * which clock input to get the parent for. 369 * 370 * Request type is TI_SCI_MSG_GET_CLOCK_PARENT, response is parent information 371 */ 372 struct ti_sci_msg_req_get_clock_parent { 373 struct ti_sci_msg_hdr hdr; 374 uint32_t dev_id; 375 uint8_t clk_id; 376 } __packed; 377 378 /** 379 * struct ti_sci_msg_resp_get_clock_parent - Response with clock parent 380 * @hdr: Generic Header 381 * @parent_id: The current clock parent 382 * 383 * Response to TI_SCI_MSG_GET_CLOCK_PARENT. 384 */ 385 struct ti_sci_msg_resp_get_clock_parent { 386 struct ti_sci_msg_hdr hdr; 387 uint8_t parent_id; 388 } __packed; 389 390 /** 391 * struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents 392 * @hdr: Generic header 393 * @dev_id: Device identifier this request is for 394 * @clk_id: Clock identifier for the device for this request. 395 * 396 * This request provides information about how many clock parent options 397 * are available for a given clock to a device. This is typically used 398 * for input clocks. 399 * 400 * Request type is TI_SCI_MSG_GET_NUM_CLOCK_PARENTS, response is appropriate 401 * message, or NACK in case of inability to satisfy request. 402 */ 403 struct ti_sci_msg_req_get_clock_num_parents { 404 struct ti_sci_msg_hdr hdr; 405 uint32_t dev_id; 406 uint8_t clk_id; 407 } __packed; 408 409 /** 410 * struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents 411 * @hdr: Generic header 412 * @num_parents: Number of clock parents 413 * 414 * Response to TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 415 */ 416 struct ti_sci_msg_resp_get_clock_num_parents { 417 struct ti_sci_msg_hdr hdr; 418 uint8_t num_parents; 419 } __packed; 420 421 /** 422 * struct ti_sci_msg_req_query_clock_freq - Request to query a frequency 423 * @hdr: Generic Header 424 * @dev_id: Device identifier this request is for 425 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 426 * allowable programmed frequency and does not account for clock 427 * tolerances and jitter. 428 * @target_freq_hz: The target clock frequency. A frequency will be found 429 * as close to this target frequency as possible. 430 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 431 * allowable programmed frequency and does not account for clock 432 * tolerances and jitter. 433 * @clk_id: Clock identifier for the device for this request. 434 * 435 * NOTE: Normally clock frequency management is automatically done by TISCI 436 * entity. In case of specific requests, TISCI evaluates capability to achieve 437 * requested frequency within provided range and responds with 438 * result message. 439 * 440 * Request type is TI_SCI_MSG_QUERY_CLOCK_FREQ, response is appropriate message, 441 * or NACK in case of inability to satisfy request. 442 */ 443 struct ti_sci_msg_req_query_clock_freq { 444 struct ti_sci_msg_hdr hdr; 445 uint32_t dev_id; 446 uint64_t min_freq_hz; 447 uint64_t target_freq_hz; 448 uint64_t max_freq_hz; 449 uint8_t clk_id; 450 } __packed; 451 452 /** 453 * struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query 454 * @hdr: Generic Header 455 * @freq_hz: Frequency that is the best match in Hz. 456 * 457 * Response to request type TI_SCI_MSG_QUERY_CLOCK_FREQ. NOTE: if the request 458 * cannot be satisfied, the message will be of type NACK. 459 */ 460 struct ti_sci_msg_resp_query_clock_freq { 461 struct ti_sci_msg_hdr hdr; 462 uint64_t freq_hz; 463 } __packed; 464 465 /** 466 * struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency 467 * @hdr: Generic Header 468 * @dev_id: Device identifier this request is for 469 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 470 * allowable programmed frequency and does not account for clock 471 * tolerances and jitter. 472 * @target_freq_hz: The target clock frequency. The clock will be programmed 473 * at a rate as close to this target frequency as possible. 474 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 475 * allowable programmed frequency and does not account for clock 476 * tolerances and jitter. 477 * @clk_id: Clock identifier for the device for this request. 478 * 479 * NOTE: Normally clock frequency management is automatically done by TISCI 480 * entity. In case of specific requests, TISCI evaluates capability to achieve 481 * requested range and responds with success/failure message. 482 * 483 * This sets the desired frequency for a clock within an allowable 484 * range. This message will fail on an enabled clock unless 485 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE is set for the clock. Additionally, 486 * if other clocks have their frequency modified due to this message, 487 * they also must have the MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE or be disabled. 488 * 489 * Calling set frequency on a clock input to the SoC pseudo-device will 490 * inform the PMMC of that clock's frequency. Setting a frequency of 491 * zero will indicate the clock is disabled. 492 * 493 * Calling set frequency on clock outputs from the SoC pseudo-device will 494 * function similarly to setting the clock frequency on a device. 495 * 496 * Request type is TI_SCI_MSG_SET_CLOCK_FREQ, response is a generic ACK/NACK 497 * message. 498 */ 499 struct ti_sci_msg_req_set_clock_freq { 500 struct ti_sci_msg_hdr hdr; 501 uint32_t dev_id; 502 uint64_t min_freq_hz; 503 uint64_t target_freq_hz; 504 uint64_t max_freq_hz; 505 uint8_t clk_id; 506 } __packed; 507 508 /** 509 * struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency 510 * @hdr: Generic Header 511 * @dev_id: Device identifier this request is for 512 * @clk_id: Clock identifier for the device for this request. 513 * 514 * NOTE: Normally clock frequency management is automatically done by TISCI 515 * entity. In some cases, clock frequencies are configured by host. 516 * 517 * Request type is TI_SCI_MSG_GET_CLOCK_FREQ, responded with clock frequency 518 * that the clock is currently at. 519 */ 520 struct ti_sci_msg_req_get_clock_freq { 521 struct ti_sci_msg_hdr hdr; 522 uint32_t dev_id; 523 uint8_t clk_id; 524 } __packed; 525 526 /** 527 * struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request 528 * @hdr: Generic Header 529 * @freq_hz: Frequency that the clock is currently on, in Hz. 530 * 531 * Response to request type TI_SCI_MSG_GET_CLOCK_FREQ. 532 */ 533 struct ti_sci_msg_resp_get_clock_freq { 534 struct ti_sci_msg_hdr hdr; 535 uint64_t freq_hz; 536 } __packed; 537 538 #define TISCI_ADDR_LOW_MASK 0x00000000ffffffff 539 #define TISCI_ADDR_HIGH_MASK 0xffffffff00000000 540 #define TISCI_ADDR_HIGH_SHIFT 32 541 542 /** 543 * struct ti_sci_msg_req_proc_request - Request a processor 544 * 545 * @hdr: Generic Header 546 * @processor_id: ID of processor 547 * 548 * Request type is TISCI_MSG_PROC_REQUEST, response is a generic ACK/NACK 549 * message. 550 */ 551 struct ti_sci_msg_req_proc_request { 552 struct ti_sci_msg_hdr hdr; 553 uint8_t processor_id; 554 } __packed; 555 556 /** 557 * struct ti_sci_msg_req_proc_release - Release a processor 558 * 559 * @hdr: Generic Header 560 * @processor_id: ID of processor 561 * 562 * Request type is TISCI_MSG_PROC_RELEASE, response is a generic ACK/NACK 563 * message. 564 */ 565 struct ti_sci_msg_req_proc_release { 566 struct ti_sci_msg_hdr hdr; 567 uint8_t processor_id; 568 } __packed; 569 570 /** 571 * struct ti_sci_msg_req_proc_handover - Handover a processor to a host 572 * 573 * @hdr: Generic Header 574 * @processor_id: ID of processor 575 * @host_id: New Host we want to give control to 576 * 577 * Request type is TISCI_MSG_PROC_HANDOVER, response is a generic ACK/NACK 578 * message. 579 */ 580 struct ti_sci_msg_req_proc_handover { 581 struct ti_sci_msg_hdr hdr; 582 uint8_t processor_id; 583 uint8_t host_id; 584 } __packed; 585 586 /* A53 Config Flags */ 587 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN 0x00000001 588 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN 0x00000002 589 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN 0x00000004 590 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN 0x00000008 591 #define PROC_BOOT_CFG_FLAG_ARMV8_AARCH32 0x00000100 592 593 /* R5 Config Flags */ 594 #define PROC_BOOT_CFG_FLAG_R5_DBG_EN 0x00000001 595 #define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN 0x00000002 596 #define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100 597 #define PROC_BOOT_CFG_FLAG_R5_TEINIT 0x00000200 598 #define PROC_BOOT_CFG_FLAG_R5_NMFI_EN 0x00000400 599 #define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE 0x00000800 600 #define PROC_BOOT_CFG_FLAG_R5_BTCM_EN 0x00001000 601 #define PROC_BOOT_CFG_FLAG_R5_ATCM_EN 0x00002000 602 603 /** 604 * struct ti_sci_msg_req_set_proc_boot_config - Set Processor boot configuration 605 * @hdr: Generic Header 606 * @processor_id: ID of processor 607 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 608 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 609 * @config_flags_set: Optional Processor specific Config Flags to set. 610 * Setting a bit here implies required bit sets to 1. 611 * @config_flags_clear: Optional Processor specific Config Flags to clear. 612 * Setting a bit here implies required bit gets cleared. 613 * 614 * Request type is TISCI_MSG_SET_PROC_BOOT_CONFIG, response is a generic 615 * ACK/NACK message. 616 */ 617 struct ti_sci_msg_req_set_proc_boot_config { 618 struct ti_sci_msg_hdr hdr; 619 uint8_t processor_id; 620 uint32_t bootvector_low; 621 uint32_t bootvector_high; 622 uint32_t config_flags_set; 623 uint32_t config_flags_clear; 624 } __packed; 625 626 /* ARMV8 Control Flags */ 627 #define PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM 0x00000001 628 #define PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS 0x00000002 629 #define PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ 0x00000100 630 631 /* R5 Control Flags */ 632 #define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001 633 634 /** 635 * struct ti_sci_msg_req_set_proc_boot_ctrl - Set Processor boot control flags 636 * @hdr: Generic Header 637 * @processor_id: ID of processor 638 * @config_flags_set: Optional Processor specific Config Flags to set. 639 * Setting a bit here implies required bit sets to 1. 640 * @config_flags_clear: Optional Processor specific Config Flags to clear. 641 * Setting a bit here implies required bit gets cleared. 642 * 643 * Request type is TISCI_MSG_SET_PROC_BOOT_CTRL, response is a generic ACK/NACK 644 * message. 645 */ 646 struct ti_sci_msg_req_set_proc_boot_ctrl { 647 struct ti_sci_msg_hdr hdr; 648 uint8_t processor_id; 649 uint32_t control_flags_set; 650 uint32_t control_flags_clear; 651 } __packed; 652 653 /** 654 * struct ti_sci_msg_req_proc_auth_start_image - Authenticate and start image 655 * @hdr: Generic Header 656 * @processor_id: ID of processor 657 * @cert_addr_low: Lower 32bit (Little Endian) of certificate 658 * @cert_addr_high: Higher 32bit (Little Endian) of certificate 659 * 660 * Request type is TISCI_MSG_PROC_AUTH_BOOT_IMAGE, response is a generic 661 * ACK/NACK message. 662 */ 663 struct ti_sci_msg_req_proc_auth_boot_image { 664 struct ti_sci_msg_hdr hdr; 665 uint8_t processor_id; 666 uint32_t cert_addr_low; 667 uint32_t cert_addr_high; 668 } __packed; 669 670 /** 671 * struct ti_sci_msg_req_get_proc_boot_status - Get processor boot status 672 * @hdr: Generic Header 673 * @processor_id: ID of processor 674 * 675 * Request type is TISCI_MSG_GET_PROC_BOOT_STATUS, response is appropriate 676 * message, or NACK in case of inability to satisfy request. 677 */ 678 struct ti_sci_msg_req_get_proc_boot_status { 679 struct ti_sci_msg_hdr hdr; 680 uint8_t processor_id; 681 } __packed; 682 683 /* ARMv8 Status Flags */ 684 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFE 0x00000001 685 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFI 0x00000002 686 #define PROC_BOOT_STATUS_FLAG_ARMV8_L2F_DONE 0x00000010 687 #define PROC_BOOT_STATUS_FLAG_ARMV8_STANDBYWFIL2 0x00000020 688 689 /* R5 Status Flags */ 690 #define PROC_BOOT_STATUS_FLAG_R5_WFE 0x00000001 691 #define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002 692 #define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED 0x00000004 693 #define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED 0x00000100 694 695 /** 696 * \brief Processor Status Response 697 * struct ti_sci_msg_resp_get_proc_boot_status - Processor boot status response 698 * @hdr: Generic Header 699 * @processor_id: ID of processor 700 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 701 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 702 * @config_flags: Optional Processor specific Config Flags set. 703 * @control_flags: Optional Processor specific Control Flags. 704 * @status_flags: Optional Processor specific Status Flags set. 705 * 706 * Response to TISCI_MSG_GET_PROC_BOOT_STATUS. 707 */ 708 struct ti_sci_msg_resp_get_proc_boot_status { 709 struct ti_sci_msg_hdr hdr; 710 uint8_t processor_id; 711 uint32_t bootvector_low; 712 uint32_t bootvector_high; 713 uint32_t config_flags; 714 uint32_t control_flags; 715 uint32_t status_flags; 716 } __packed; 717 718 /** 719 * struct ti_sci_msg_req_wait_proc_boot_status - Wait for a processor boot status 720 * @hdr: Generic Header 721 * @processor_id: ID of processor 722 * @num_wait_iterations Total number of iterations we will check before 723 * we will timeout and give up 724 * @num_match_iterations How many iterations should we have continued 725 * status to account for status bits glitching. 726 * This is to make sure that match occurs for 727 * consecutive checks. This implies that the 728 * worst case should consider that the stable 729 * time should at the worst be num_wait_iterations 730 * num_match_iterations to prevent timeout. 731 * @delay_per_iteration_us Specifies how long to wait (in micro seconds) 732 * between each status checks. This is the minimum 733 * duration, and overhead of register reads and 734 * checks are on top of this and can vary based on 735 * varied conditions. 736 * @delay_before_iterations_us Specifies how long to wait (in micro seconds) 737 * before the very first check in the first 738 * iteration of status check loop. This is the 739 * minimum duration, and overhead of register 740 * reads and checks are. 741 * @status_flags_1_set_all_wait If non-zero, Specifies that all bits of the 742 * status matching this field requested MUST be 1. 743 * @status_flags_1_set_any_wait If non-zero, Specifies that at least one of the 744 * bits matching this field requested MUST be 1. 745 * @status_flags_1_clr_all_wait If non-zero, Specifies that all bits of the 746 * status matching this field requested MUST be 0. 747 * @status_flags_1_clr_any_wait If non-zero, Specifies that at least one of the 748 * bits matching this field requested MUST be 0. 749 * 750 * Request type is TISCI_MSG_WAIT_PROC_BOOT_STATUS, response is appropriate 751 * message, or NACK in case of inability to satisfy request. 752 */ 753 struct ti_sci_msg_req_wait_proc_boot_status { 754 struct ti_sci_msg_hdr hdr; 755 uint8_t processor_id; 756 uint8_t num_wait_iterations; 757 uint8_t num_match_iterations; 758 uint8_t delay_per_iteration_us; 759 uint8_t delay_before_iterations_us; 760 uint32_t status_flags_1_set_all_wait; 761 uint32_t status_flags_1_set_any_wait; 762 uint32_t status_flags_1_clr_all_wait; 763 uint32_t status_flags_1_clr_any_wait; 764 } __packed; 765 766 /** 767 * struct ti_sci_msg_req_enter_sleep - Request for TI_SCI_MSG_ENTER_SLEEP. 768 * 769 * @hdr Generic Header 770 * @mode Low power mode to enter. 771 * @proc_id Processor id to be restored. 772 * @core_resume_lo Low 32-bits of physical pointer to address for core 773 * to begin execution upon resume. 774 * @core_resume_hi High 32-bits of physical pointer to address for core 775 * to begin execution upon resume. 776 * 777 * This message is to be sent after TI_SCI_MSG_PREPARE_SLEEP is sent from OS 778 * and is what actually triggers entry into the specified low power mode. 779 */ 780 struct ti_sci_msg_req_enter_sleep { 781 struct ti_sci_msg_hdr hdr; 782 #define MSG_VALUE_SLEEP_MODE_DEEP_SLEEP 0x0 783 uint8_t mode; 784 uint8_t processor_id; 785 uint32_t core_resume_lo; 786 uint32_t core_resume_hi; 787 } __packed; 788 789 /** 790 * struct ti_sci_msg_req_lpm_get_next_sys_mode - Request for TI_SCI_MSG_LPM_GET_NEXT_SYS_MODE. 791 * 792 * @hdr Generic Header 793 * 794 * This message is used to enquire DM for selected system wide low power mode. 795 */ 796 struct ti_sci_msg_req_lpm_get_next_sys_mode { 797 struct ti_sci_msg_hdr hdr; 798 } __packed; 799 800 /** 801 * struct ti_sci_msg_resp_lpm_get_next_sys_mode - Response for TI_SCI_MSG_LPM_GET_NEXT_SYS_MODE. 802 * 803 * @hdr Generic Header 804 * @mode The selected system wide low power mode. 805 * 806 * Note: If the mode selection is not yet locked, this API returns "not selected" mode. 807 */ 808 struct ti_sci_msg_resp_lpm_get_next_sys_mode { 809 struct ti_sci_msg_hdr hdr; 810 uint8_t mode; 811 } __packed; 812 813 #endif /* TI_SCI_PROTOCOL_H */ 814