1 /* 2 * Texas Instruments System Control Interface (TISCI) Protocol 3 * 4 * Communication protocol with TI SCI hardware 5 * The system works in a message response protocol 6 * See: http://processors.wiki.ti.com/index.php/TISCI for details 7 * 8 * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/ 9 * 10 * SPDX-License-Identifier: BSD-3-Clause 11 */ 12 13 #ifndef TI_SCI_PROTOCOL_H 14 #define TI_SCI_PROTOCOL_H 15 16 #include <stdint.h> 17 18 /* Generic Messages */ 19 #define TI_SCI_MSG_ENABLE_WDT 0x0000 20 #define TI_SCI_MSG_WAKE_RESET 0x0001 21 #define TI_SCI_MSG_VERSION 0x0002 22 #define TI_SCI_MSG_WAKE_REASON 0x0003 23 #define TI_SCI_MSG_GOODBYE 0x0004 24 #define TI_SCI_MSG_SYS_RESET 0x0005 25 #define TI_SCI_MSG_BOOT_NOTIFICATION 0x000A 26 #define TI_SCI_MSG_QUERY_FW_CAPS 0x0022 27 28 /* Device requests */ 29 #define TI_SCI_MSG_SET_DEVICE_STATE 0x0200 30 #define TI_SCI_MSG_GET_DEVICE_STATE 0x0201 31 #define TI_SCI_MSG_SET_DEVICE_RESETS 0x0202 32 33 /* Low Power Mode Requests */ 34 #define TI_SCI_MSG_ENTER_SLEEP 0x0301 35 #define TI_SCI_MSG_LPM_GET_NEXT_SYS_MODE 0x030d 36 37 /* Clock requests */ 38 #define TI_SCI_MSG_SET_CLOCK_STATE 0x0100 39 #define TI_SCI_MSG_GET_CLOCK_STATE 0x0101 40 #define TI_SCI_MSG_SET_CLOCK_PARENT 0x0102 41 #define TI_SCI_MSG_GET_CLOCK_PARENT 0x0103 42 #define TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 0x0104 43 #define TI_SCI_MSG_SET_CLOCK_FREQ 0x010c 44 #define TI_SCI_MSG_QUERY_CLOCK_FREQ 0x010d 45 #define TI_SCI_MSG_GET_CLOCK_FREQ 0x010e 46 47 /* Processor Control Messages */ 48 #define TISCI_MSG_PROC_REQUEST 0xc000 49 #define TISCI_MSG_PROC_RELEASE 0xc001 50 #define TISCI_MSG_PROC_HANDOVER 0xc005 51 #define TISCI_MSG_SET_PROC_BOOT_CONFIG 0xc100 52 #define TISCI_MSG_SET_PROC_BOOT_CTRL 0xc101 53 #define TISCI_MSG_PROC_AUTH_BOOT_IMAGE 0xc120 54 #define TISCI_MSG_GET_PROC_BOOT_STATUS 0xc400 55 #define TISCI_MSG_WAIT_PROC_BOOT_STATUS 0xc401 56 57 /** 58 * struct ti_sci_secure_msg_hdr - Header that prefixes all TISCI messages sent 59 * via secure transport. 60 * @checksum: crc16 checksum for the entire message 61 * @reserved: Reserved for future use. 62 */ 63 struct ti_sci_secure_msg_hdr { 64 uint16_t checksum; 65 uint16_t reserved; 66 } __packed; 67 68 /** 69 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses 70 * @type: Type of messages: One of TI_SCI_MSG* values 71 * @host: Host of the message 72 * @seq: Message identifier indicating a transfer sequence 73 * @flags: Flag for the message 74 */ 75 struct ti_sci_msg_hdr { 76 struct ti_sci_secure_msg_hdr sec_hdr; 77 uint16_t type; 78 uint8_t host; 79 uint8_t seq; 80 #define TI_SCI_MSG_FLAG(val) (1 << (val)) 81 #define TI_SCI_FLAG_REQ_GENERIC_NORESPONSE 0x0 82 #define TI_SCI_FLAG_REQ_ACK_ON_RECEIVED TI_SCI_MSG_FLAG(0) 83 #define TI_SCI_FLAG_REQ_ACK_ON_PROCESSED TI_SCI_MSG_FLAG(1) 84 #define TI_SCI_FLAG_RESP_GENERIC_NACK 0x0 85 #define TI_SCI_FLAG_RESP_GENERIC_ACK TI_SCI_MSG_FLAG(1) 86 /* Additional Flags */ 87 uint32_t flags; 88 } __packed; 89 90 /** 91 * struct ti_sci_msg_version_req - Request for firmware version information 92 * @hdr: Generic header 93 * 94 * Request for TI_SCI_MSG_VERSION 95 */ 96 struct ti_sci_msg_req_version { 97 struct ti_sci_msg_hdr hdr; 98 } __packed; 99 100 /** 101 * struct ti_sci_msg_resp_version - Response for firmware version information 102 * @hdr: Generic header 103 * @firmware_description: String describing the firmware 104 * @firmware_revision: Firmware revision 105 * @abi_major: Major version of the ABI that firmware supports 106 * @abi_minor: Minor version of the ABI that firmware supports 107 * @sub_version: Sub-version number of the firmware 108 * @patch_version: Patch-version number of the firmware. 109 * 110 * In general, ABI version changes follow the rule that minor version increments 111 * are backward compatible. Major revision changes in ABI may not be 112 * backward compatible. 113 * 114 * Response to request TI_SCI_MSG_VERSION 115 */ 116 struct ti_sci_msg_resp_version { 117 struct ti_sci_msg_hdr hdr; 118 #define FIRMWARE_DESCRIPTION_LENGTH 32 119 char firmware_description[FIRMWARE_DESCRIPTION_LENGTH]; 120 uint16_t firmware_revision; 121 uint8_t abi_major; 122 uint8_t abi_minor; 123 uint8_t sub_version; 124 uint8_t patch_version; 125 } __packed; 126 127 /** 128 * struct ti_sci_msg_req_reboot - Reboot the SoC 129 * @hdr: Generic Header 130 * @domain: Domain to be reset, 0 for full SoC reboot 131 * 132 * Request type is TI_SCI_MSG_SYS_RESET, responded with a generic 133 * ACK/NACK message. 134 */ 135 struct ti_sci_msg_req_reboot { 136 struct ti_sci_msg_hdr hdr; 137 #define TI_SCI_DOMAIN_FULL_SOC_RESET 0x0 138 uint8_t domain; 139 } __packed; 140 141 /** 142 * struct ti_sci_msg_resp_query_fw_caps - Response for query firmware caps 143 * @hdr: Generic header 144 * @fw_caps: Each bit in fw_caps indicating one FW/SOC capability 145 * MSG_FLAG_CAPS_GENERIC: Generic capability (LPM not supported) 146 * MSG_FLAG_CAPS_LPM_DEEP_SLEEP: Deep Sleep LPM 147 * MSG_FLAG_CAPS_LPM_MCU_ONLY: MCU only LPM 148 * MSG_FLAG_CAPS_LPM_STANDBY: Standby LPM 149 * MSG_FLAG_CAPS_LPM_PARTIAL_IO: Partial IO in LPM 150 * MSG_FLAG_CAPS_LPM_DM_MANAGED: LPM can be managed by DM 151 * 152 * Response to a generic message with message type TI_SCI_MSG_QUERY_FW_CAPS 153 * providing currently available SOC/firmware capabilities. SoC that don't 154 * support low power modes return only MSG_FLAG_CAPS_GENERIC capability. 155 */ 156 struct ti_sci_msg_resp_query_fw_caps { 157 struct ti_sci_msg_hdr hdr; 158 #define MSG_FLAG_CAPS_GENERIC TI_SCI_MSG_FLAG(0) 159 #define MSG_FLAG_CAPS_LPM_DEEP_SLEEP TI_SCI_MSG_FLAG(1) 160 #define MSG_FLAG_CAPS_LPM_MCU_ONLY TI_SCI_MSG_FLAG(2) 161 #define MSG_FLAG_CAPS_LPM_STANDBY TI_SCI_MSG_FLAG(3) 162 #define MSG_FLAG_CAPS_LPM_PARTIAL_IO TI_SCI_MSG_FLAG(4) 163 #define MSG_FLAG_CAPS_LPM_DM_MANAGED TI_SCI_MSG_FLAG(5) 164 uint64_t fw_caps; 165 } __packed; 166 167 /** 168 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device 169 * @hdr: Generic header 170 * @id: Indicates which device to modify 171 * @reserved: Reserved space in message, must be 0 for backward compatibility 172 * @state: The desired state of the device. 173 * 174 * Certain flags can also be set to alter the device state: 175 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source. 176 * The meaning of this flag will vary slightly from device to device and from 177 * SoC to SoC but it generally allows the device to wake the SoC out of deep 178 * suspend states. 179 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device. 180 * + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed 181 * with STATE_RETENTION or STATE_ON, it will claim the device exclusively. 182 * If another host already has this device set to STATE_RETENTION or STATE_ON, 183 * the message will fail. Once successful, other hosts attempting to set 184 * STATE_RETENTION or STATE_ON will fail. 185 * 186 * Request type is TI_SCI_MSG_SET_DEVICE_STATE, responded with a generic 187 * ACK/NACK message. 188 */ 189 struct ti_sci_msg_req_set_device_state { 190 /* Additional hdr->flags options */ 191 #define MSG_FLAG_DEVICE_WAKE_ENABLED TI_SCI_MSG_FLAG(8) 192 #define MSG_FLAG_DEVICE_RESET_ISO TI_SCI_MSG_FLAG(9) 193 #define MSG_FLAG_DEVICE_EXCLUSIVE TI_SCI_MSG_FLAG(10) 194 struct ti_sci_msg_hdr hdr; 195 uint32_t id; 196 uint32_t reserved; 197 198 #define MSG_DEVICE_SW_STATE_AUTO_OFF 0 199 #define MSG_DEVICE_SW_STATE_RETENTION 1 200 #define MSG_DEVICE_SW_STATE_ON 2 201 uint8_t state; 202 } __packed; 203 204 /** 205 * struct ti_sci_msg_req_get_device_state - Request to get device. 206 * @hdr: Generic header 207 * @id: Device Identifier 208 * 209 * Request type is TI_SCI_MSG_GET_DEVICE_STATE, responded device state 210 * information 211 */ 212 struct ti_sci_msg_req_get_device_state { 213 struct ti_sci_msg_hdr hdr; 214 uint32_t id; 215 } __packed; 216 217 /** 218 * struct ti_sci_msg_resp_get_device_state - Response to get device request. 219 * @hdr: Generic header 220 * @context_loss_count: Indicates how many times the device has lost context. A 221 * driver can use this monotonic counter to determine if the device has 222 * lost context since the last time this message was exchanged. 223 * @resets: Programmed state of the reset lines. 224 * @programmed_state: The state as programmed by set_device. 225 * - Uses the MSG_DEVICE_SW_* macros 226 * @current_state: The actual state of the hardware. 227 * 228 * Response to request TI_SCI_MSG_GET_DEVICE_STATE. 229 */ 230 struct ti_sci_msg_resp_get_device_state { 231 struct ti_sci_msg_hdr hdr; 232 uint32_t context_loss_count; 233 uint32_t resets; 234 uint8_t programmed_state; 235 #define MSG_DEVICE_HW_STATE_OFF 0 236 #define MSG_DEVICE_HW_STATE_ON 1 237 #define MSG_DEVICE_HW_STATE_TRANS 2 238 uint8_t current_state; 239 } __packed; 240 241 /** 242 * struct ti_sci_msg_req_set_device_resets - Set the desired resets 243 * configuration of the device 244 * @hdr: Generic header 245 * @id: Indicates which device to modify 246 * @resets: A bit field of resets for the device. The meaning, behavior, 247 * and usage of the reset flags are device specific. 0 for a bit 248 * indicates releasing the reset represented by that bit while 1 249 * indicates keeping it held. 250 * 251 * Request type is TI_SCI_MSG_SET_DEVICE_RESETS, responded with a generic 252 * ACK/NACK message. 253 */ 254 struct ti_sci_msg_req_set_device_resets { 255 struct ti_sci_msg_hdr hdr; 256 uint32_t id; 257 uint32_t resets; 258 } __packed; 259 260 /** 261 * struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state 262 * @hdr: Generic Header, Certain flags can be set specific to the clocks: 263 * MSG_FLAG_CLOCK_ALLOW_SSC: Allow this clock to be modified 264 * via spread spectrum clocking. 265 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE: Allow this clock's 266 * frequency to be changed while it is running so long as it 267 * is within the min/max limits. 268 * MSG_FLAG_CLOCK_INPUT_TERM: Enable input termination, this 269 * is only applicable to clock inputs on the SoC pseudo-device. 270 * @dev_id: Device identifier this request is for 271 * @clk_id: Clock identifier for the device for this request. 272 * Each device has it's own set of clock inputs. This indexes 273 * which clock input to modify. 274 * @request_state: Request the state for the clock to be set to. 275 * MSG_CLOCK_SW_STATE_UNREQ: The IP does not require this clock, 276 * it can be disabled, regardless of the state of the device 277 * MSG_CLOCK_SW_STATE_AUTO: Allow the System Controller to 278 * automatically manage the state of this clock. If the device 279 * is enabled, then the clock is enabled. If the device is set 280 * to off or retention, then the clock is internally set as not 281 * being required by the device.(default) 282 * MSG_CLOCK_SW_STATE_REQ: Configure the clock to be enabled, 283 * regardless of the state of the device. 284 * 285 * Normally, all required clocks are managed by TISCI entity, this is used 286 * only for specific control *IF* required. Auto managed state is 287 * MSG_CLOCK_SW_STATE_AUTO, in other states, TISCI entity assume remote 288 * will explicitly control. 289 * 290 * Request type is TI_SCI_MSG_SET_CLOCK_STATE, response is a generic 291 * ACK or NACK message. 292 */ 293 struct ti_sci_msg_req_set_clock_state { 294 /* Additional hdr->flags options */ 295 #define MSG_FLAG_CLOCK_ALLOW_SSC TI_SCI_MSG_FLAG(8) 296 #define MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE TI_SCI_MSG_FLAG(9) 297 #define MSG_FLAG_CLOCK_INPUT_TERM TI_SCI_MSG_FLAG(10) 298 struct ti_sci_msg_hdr hdr; 299 uint32_t dev_id; 300 uint8_t clk_id; 301 #define MSG_CLOCK_SW_STATE_UNREQ 0 302 #define MSG_CLOCK_SW_STATE_AUTO 1 303 #define MSG_CLOCK_SW_STATE_REQ 2 304 uint8_t request_state; 305 } __packed; 306 307 /** 308 * struct ti_sci_msg_req_get_clock_state - Request for clock state 309 * @hdr: Generic Header 310 * @dev_id: Device identifier this request is for 311 * @clk_id: Clock identifier for the device for this request. 312 * Each device has it's own set of clock inputs. This indexes 313 * which clock input to get state of. 314 * 315 * Request type is TI_SCI_MSG_GET_CLOCK_STATE, response is state 316 * of the clock 317 */ 318 struct ti_sci_msg_req_get_clock_state { 319 struct ti_sci_msg_hdr hdr; 320 uint32_t dev_id; 321 uint8_t clk_id; 322 } __packed; 323 324 /** 325 * struct ti_sci_msg_resp_get_clock_state - Response to get clock state 326 * @hdr: Generic Header 327 * @programmed_state: Any programmed state of the clock. This is one of 328 * MSG_CLOCK_SW_STATE* values. 329 * @current_state: Current state of the clock. This is one of: 330 * MSG_CLOCK_HW_STATE_NOT_READY: Clock is not ready 331 * MSG_CLOCK_HW_STATE_READY: Clock is ready 332 * 333 * Response to TI_SCI_MSG_GET_CLOCK_STATE. 334 */ 335 struct ti_sci_msg_resp_get_clock_state { 336 struct ti_sci_msg_hdr hdr; 337 uint8_t programmed_state; 338 #define MSG_CLOCK_HW_STATE_NOT_READY 0 339 #define MSG_CLOCK_HW_STATE_READY 1 340 uint8_t current_state; 341 } __packed; 342 343 /** 344 * struct ti_sci_msg_req_set_clock_parent - Set the clock parent 345 * @hdr: Generic Header 346 * @dev_id: Device identifier this request is for 347 * @clk_id: Clock identifier for the device for this request. 348 * Each device has it's own set of clock inputs. This indexes 349 * which clock input to modify. 350 * @parent_id: The new clock parent is selectable by an index via this 351 * parameter. 352 * 353 * Request type is TI_SCI_MSG_SET_CLOCK_PARENT, response is generic 354 * ACK / NACK message. 355 */ 356 struct ti_sci_msg_req_set_clock_parent { 357 struct ti_sci_msg_hdr hdr; 358 uint32_t dev_id; 359 uint8_t clk_id; 360 uint8_t parent_id; 361 } __packed; 362 363 /** 364 * struct ti_sci_msg_req_get_clock_parent - Get the clock parent 365 * @hdr: Generic Header 366 * @dev_id: Device identifier this request is for 367 * @clk_id: Clock identifier for the device for this request. 368 * Each device has it's own set of clock inputs. This indexes 369 * which clock input to get the parent for. 370 * 371 * Request type is TI_SCI_MSG_GET_CLOCK_PARENT, response is parent information 372 */ 373 struct ti_sci_msg_req_get_clock_parent { 374 struct ti_sci_msg_hdr hdr; 375 uint32_t dev_id; 376 uint8_t clk_id; 377 } __packed; 378 379 /** 380 * struct ti_sci_msg_resp_get_clock_parent - Response with clock parent 381 * @hdr: Generic Header 382 * @parent_id: The current clock parent 383 * 384 * Response to TI_SCI_MSG_GET_CLOCK_PARENT. 385 */ 386 struct ti_sci_msg_resp_get_clock_parent { 387 struct ti_sci_msg_hdr hdr; 388 uint8_t parent_id; 389 } __packed; 390 391 /** 392 * struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents 393 * @hdr: Generic header 394 * @dev_id: Device identifier this request is for 395 * @clk_id: Clock identifier for the device for this request. 396 * 397 * This request provides information about how many clock parent options 398 * are available for a given clock to a device. This is typically used 399 * for input clocks. 400 * 401 * Request type is TI_SCI_MSG_GET_NUM_CLOCK_PARENTS, response is appropriate 402 * message, or NACK in case of inability to satisfy request. 403 */ 404 struct ti_sci_msg_req_get_clock_num_parents { 405 struct ti_sci_msg_hdr hdr; 406 uint32_t dev_id; 407 uint8_t clk_id; 408 } __packed; 409 410 /** 411 * struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents 412 * @hdr: Generic header 413 * @num_parents: Number of clock parents 414 * 415 * Response to TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 416 */ 417 struct ti_sci_msg_resp_get_clock_num_parents { 418 struct ti_sci_msg_hdr hdr; 419 uint8_t num_parents; 420 } __packed; 421 422 /** 423 * struct ti_sci_msg_req_query_clock_freq - Request to query a frequency 424 * @hdr: Generic Header 425 * @dev_id: Device identifier this request is for 426 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 427 * allowable programmed frequency and does not account for clock 428 * tolerances and jitter. 429 * @target_freq_hz: The target clock frequency. A frequency will be found 430 * as close to this target frequency as possible. 431 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 432 * allowable programmed frequency and does not account for clock 433 * tolerances and jitter. 434 * @clk_id: Clock identifier for the device for this request. 435 * 436 * NOTE: Normally clock frequency management is automatically done by TISCI 437 * entity. In case of specific requests, TISCI evaluates capability to achieve 438 * requested frequency within provided range and responds with 439 * result message. 440 * 441 * Request type is TI_SCI_MSG_QUERY_CLOCK_FREQ, response is appropriate message, 442 * or NACK in case of inability to satisfy request. 443 */ 444 struct ti_sci_msg_req_query_clock_freq { 445 struct ti_sci_msg_hdr hdr; 446 uint32_t dev_id; 447 uint64_t min_freq_hz; 448 uint64_t target_freq_hz; 449 uint64_t max_freq_hz; 450 uint8_t clk_id; 451 } __packed; 452 453 /** 454 * struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query 455 * @hdr: Generic Header 456 * @freq_hz: Frequency that is the best match in Hz. 457 * 458 * Response to request type TI_SCI_MSG_QUERY_CLOCK_FREQ. NOTE: if the request 459 * cannot be satisfied, the message will be of type NACK. 460 */ 461 struct ti_sci_msg_resp_query_clock_freq { 462 struct ti_sci_msg_hdr hdr; 463 uint64_t freq_hz; 464 } __packed; 465 466 /** 467 * struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency 468 * @hdr: Generic Header 469 * @dev_id: Device identifier this request is for 470 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 471 * allowable programmed frequency and does not account for clock 472 * tolerances and jitter. 473 * @target_freq_hz: The target clock frequency. The clock will be programmed 474 * at a rate as close to this target frequency as possible. 475 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 476 * allowable programmed frequency and does not account for clock 477 * tolerances and jitter. 478 * @clk_id: Clock identifier for the device for this request. 479 * 480 * NOTE: Normally clock frequency management is automatically done by TISCI 481 * entity. In case of specific requests, TISCI evaluates capability to achieve 482 * requested range and responds with success/failure message. 483 * 484 * This sets the desired frequency for a clock within an allowable 485 * range. This message will fail on an enabled clock unless 486 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE is set for the clock. Additionally, 487 * if other clocks have their frequency modified due to this message, 488 * they also must have the MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE or be disabled. 489 * 490 * Calling set frequency on a clock input to the SoC pseudo-device will 491 * inform the PMMC of that clock's frequency. Setting a frequency of 492 * zero will indicate the clock is disabled. 493 * 494 * Calling set frequency on clock outputs from the SoC pseudo-device will 495 * function similarly to setting the clock frequency on a device. 496 * 497 * Request type is TI_SCI_MSG_SET_CLOCK_FREQ, response is a generic ACK/NACK 498 * message. 499 */ 500 struct ti_sci_msg_req_set_clock_freq { 501 struct ti_sci_msg_hdr hdr; 502 uint32_t dev_id; 503 uint64_t min_freq_hz; 504 uint64_t target_freq_hz; 505 uint64_t max_freq_hz; 506 uint8_t clk_id; 507 } __packed; 508 509 /** 510 * struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency 511 * @hdr: Generic Header 512 * @dev_id: Device identifier this request is for 513 * @clk_id: Clock identifier for the device for this request. 514 * 515 * NOTE: Normally clock frequency management is automatically done by TISCI 516 * entity. In some cases, clock frequencies are configured by host. 517 * 518 * Request type is TI_SCI_MSG_GET_CLOCK_FREQ, responded with clock frequency 519 * that the clock is currently at. 520 */ 521 struct ti_sci_msg_req_get_clock_freq { 522 struct ti_sci_msg_hdr hdr; 523 uint32_t dev_id; 524 uint8_t clk_id; 525 } __packed; 526 527 /** 528 * struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request 529 * @hdr: Generic Header 530 * @freq_hz: Frequency that the clock is currently on, in Hz. 531 * 532 * Response to request type TI_SCI_MSG_GET_CLOCK_FREQ. 533 */ 534 struct ti_sci_msg_resp_get_clock_freq { 535 struct ti_sci_msg_hdr hdr; 536 uint64_t freq_hz; 537 } __packed; 538 539 #define TISCI_ADDR_LOW_MASK 0x00000000ffffffff 540 #define TISCI_ADDR_HIGH_MASK 0xffffffff00000000 541 #define TISCI_ADDR_HIGH_SHIFT 32 542 543 /** 544 * struct ti_sci_msg_req_proc_request - Request a processor 545 * 546 * @hdr: Generic Header 547 * @processor_id: ID of processor 548 * 549 * Request type is TISCI_MSG_PROC_REQUEST, response is a generic ACK/NACK 550 * message. 551 */ 552 struct ti_sci_msg_req_proc_request { 553 struct ti_sci_msg_hdr hdr; 554 uint8_t processor_id; 555 } __packed; 556 557 /** 558 * struct ti_sci_msg_req_proc_release - Release a processor 559 * 560 * @hdr: Generic Header 561 * @processor_id: ID of processor 562 * 563 * Request type is TISCI_MSG_PROC_RELEASE, response is a generic ACK/NACK 564 * message. 565 */ 566 struct ti_sci_msg_req_proc_release { 567 struct ti_sci_msg_hdr hdr; 568 uint8_t processor_id; 569 } __packed; 570 571 /** 572 * struct ti_sci_msg_req_proc_handover - Handover a processor to a host 573 * 574 * @hdr: Generic Header 575 * @processor_id: ID of processor 576 * @host_id: New Host we want to give control to 577 * 578 * Request type is TISCI_MSG_PROC_HANDOVER, response is a generic ACK/NACK 579 * message. 580 */ 581 struct ti_sci_msg_req_proc_handover { 582 struct ti_sci_msg_hdr hdr; 583 uint8_t processor_id; 584 uint8_t host_id; 585 } __packed; 586 587 /* A53 Config Flags */ 588 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN 0x00000001 589 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN 0x00000002 590 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN 0x00000004 591 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN 0x00000008 592 #define PROC_BOOT_CFG_FLAG_ARMV8_AARCH32 0x00000100 593 594 /* R5 Config Flags */ 595 #define PROC_BOOT_CFG_FLAG_R5_DBG_EN 0x00000001 596 #define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN 0x00000002 597 #define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100 598 #define PROC_BOOT_CFG_FLAG_R5_TEINIT 0x00000200 599 #define PROC_BOOT_CFG_FLAG_R5_NMFI_EN 0x00000400 600 #define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE 0x00000800 601 #define PROC_BOOT_CFG_FLAG_R5_BTCM_EN 0x00001000 602 #define PROC_BOOT_CFG_FLAG_R5_ATCM_EN 0x00002000 603 604 /** 605 * struct ti_sci_msg_req_set_proc_boot_config - Set Processor boot configuration 606 * @hdr: Generic Header 607 * @processor_id: ID of processor 608 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 609 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 610 * @config_flags_set: Optional Processor specific Config Flags to set. 611 * Setting a bit here implies required bit sets to 1. 612 * @config_flags_clear: Optional Processor specific Config Flags to clear. 613 * Setting a bit here implies required bit gets cleared. 614 * 615 * Request type is TISCI_MSG_SET_PROC_BOOT_CONFIG, response is a generic 616 * ACK/NACK message. 617 */ 618 struct ti_sci_msg_req_set_proc_boot_config { 619 struct ti_sci_msg_hdr hdr; 620 uint8_t processor_id; 621 uint32_t bootvector_low; 622 uint32_t bootvector_high; 623 uint32_t config_flags_set; 624 uint32_t config_flags_clear; 625 } __packed; 626 627 /* ARMV8 Control Flags */ 628 #define PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM 0x00000001 629 #define PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS 0x00000002 630 #define PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ 0x00000100 631 632 /* R5 Control Flags */ 633 #define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001 634 635 /** 636 * struct ti_sci_msg_req_set_proc_boot_ctrl - Set Processor boot control flags 637 * @hdr: Generic Header 638 * @processor_id: ID of processor 639 * @config_flags_set: Optional Processor specific Config Flags to set. 640 * Setting a bit here implies required bit sets to 1. 641 * @config_flags_clear: Optional Processor specific Config Flags to clear. 642 * Setting a bit here implies required bit gets cleared. 643 * 644 * Request type is TISCI_MSG_SET_PROC_BOOT_CTRL, response is a generic ACK/NACK 645 * message. 646 */ 647 struct ti_sci_msg_req_set_proc_boot_ctrl { 648 struct ti_sci_msg_hdr hdr; 649 uint8_t processor_id; 650 uint32_t control_flags_set; 651 uint32_t control_flags_clear; 652 } __packed; 653 654 /** 655 * struct ti_sci_msg_req_proc_auth_start_image - Authenticate and start image 656 * @hdr: Generic Header 657 * @processor_id: ID of processor 658 * @cert_addr_low: Lower 32bit (Little Endian) of certificate 659 * @cert_addr_high: Higher 32bit (Little Endian) of certificate 660 * 661 * Request type is TISCI_MSG_PROC_AUTH_BOOT_IMAGE, response is a generic 662 * ACK/NACK message. 663 */ 664 struct ti_sci_msg_req_proc_auth_boot_image { 665 struct ti_sci_msg_hdr hdr; 666 uint8_t processor_id; 667 uint32_t cert_addr_low; 668 uint32_t cert_addr_high; 669 } __packed; 670 671 /** 672 * struct ti_sci_msg_req_get_proc_boot_status - Get processor boot status 673 * @hdr: Generic Header 674 * @processor_id: ID of processor 675 * 676 * Request type is TISCI_MSG_GET_PROC_BOOT_STATUS, response is appropriate 677 * message, or NACK in case of inability to satisfy request. 678 */ 679 struct ti_sci_msg_req_get_proc_boot_status { 680 struct ti_sci_msg_hdr hdr; 681 uint8_t processor_id; 682 } __packed; 683 684 /* ARMv8 Status Flags */ 685 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFE 0x00000001 686 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFI 0x00000002 687 #define PROC_BOOT_STATUS_FLAG_ARMV8_L2F_DONE 0x00000010 688 #define PROC_BOOT_STATUS_FLAG_ARMV8_STANDBYWFIL2 0x00000020 689 690 /* R5 Status Flags */ 691 #define PROC_BOOT_STATUS_FLAG_R5_WFE 0x00000001 692 #define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002 693 #define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED 0x00000004 694 #define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED 0x00000100 695 696 /** 697 * \brief Processor Status Response 698 * struct ti_sci_msg_resp_get_proc_boot_status - Processor boot status response 699 * @hdr: Generic Header 700 * @processor_id: ID of processor 701 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 702 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 703 * @config_flags: Optional Processor specific Config Flags set. 704 * @control_flags: Optional Processor specific Control Flags. 705 * @status_flags: Optional Processor specific Status Flags set. 706 * 707 * Response to TISCI_MSG_GET_PROC_BOOT_STATUS. 708 */ 709 struct ti_sci_msg_resp_get_proc_boot_status { 710 struct ti_sci_msg_hdr hdr; 711 uint8_t processor_id; 712 uint32_t bootvector_low; 713 uint32_t bootvector_high; 714 uint32_t config_flags; 715 uint32_t control_flags; 716 uint32_t status_flags; 717 } __packed; 718 719 /** 720 * struct ti_sci_msg_req_wait_proc_boot_status - Wait for a processor boot status 721 * @hdr: Generic Header 722 * @processor_id: ID of processor 723 * @num_wait_iterations Total number of iterations we will check before 724 * we will timeout and give up 725 * @num_match_iterations How many iterations should we have continued 726 * status to account for status bits glitching. 727 * This is to make sure that match occurs for 728 * consecutive checks. This implies that the 729 * worst case should consider that the stable 730 * time should at the worst be num_wait_iterations 731 * num_match_iterations to prevent timeout. 732 * @delay_per_iteration_us Specifies how long to wait (in micro seconds) 733 * between each status checks. This is the minimum 734 * duration, and overhead of register reads and 735 * checks are on top of this and can vary based on 736 * varied conditions. 737 * @delay_before_iterations_us Specifies how long to wait (in micro seconds) 738 * before the very first check in the first 739 * iteration of status check loop. This is the 740 * minimum duration, and overhead of register 741 * reads and checks are. 742 * @status_flags_1_set_all_wait If non-zero, Specifies that all bits of the 743 * status matching this field requested MUST be 1. 744 * @status_flags_1_set_any_wait If non-zero, Specifies that at least one of the 745 * bits matching this field requested MUST be 1. 746 * @status_flags_1_clr_all_wait If non-zero, Specifies that all bits of the 747 * status matching this field requested MUST be 0. 748 * @status_flags_1_clr_any_wait If non-zero, Specifies that at least one of the 749 * bits matching this field requested MUST be 0. 750 * 751 * Request type is TISCI_MSG_WAIT_PROC_BOOT_STATUS, response is appropriate 752 * message, or NACK in case of inability to satisfy request. 753 */ 754 struct ti_sci_msg_req_wait_proc_boot_status { 755 struct ti_sci_msg_hdr hdr; 756 uint8_t processor_id; 757 uint8_t num_wait_iterations; 758 uint8_t num_match_iterations; 759 uint8_t delay_per_iteration_us; 760 uint8_t delay_before_iterations_us; 761 uint32_t status_flags_1_set_all_wait; 762 uint32_t status_flags_1_set_any_wait; 763 uint32_t status_flags_1_clr_all_wait; 764 uint32_t status_flags_1_clr_any_wait; 765 } __packed; 766 767 /** 768 * struct ti_sci_msg_req_enter_sleep - Request for TI_SCI_MSG_ENTER_SLEEP. 769 * 770 * @hdr Generic Header 771 * @mode Low power mode to enter. 772 * @proc_id Processor id to be restored. 773 * @core_resume_lo Low 32-bits of physical pointer to address for core 774 * to begin execution upon resume. 775 * @core_resume_hi High 32-bits of physical pointer to address for core 776 * to begin execution upon resume. 777 * 778 * This message is to be sent after TI_SCI_MSG_PREPARE_SLEEP is sent from OS 779 * and is what actually triggers entry into the specified low power mode. 780 */ 781 struct ti_sci_msg_req_enter_sleep { 782 struct ti_sci_msg_hdr hdr; 783 #define MSG_VALUE_SLEEP_MODE_DEEP_SLEEP 0x0 784 uint8_t mode; 785 uint8_t processor_id; 786 uint32_t core_resume_lo; 787 uint32_t core_resume_hi; 788 } __packed; 789 790 /** 791 * struct ti_sci_msg_req_lpm_get_next_sys_mode - Request for TI_SCI_MSG_LPM_GET_NEXT_SYS_MODE. 792 * 793 * @hdr Generic Header 794 * 795 * This message is used to enquire DM for selected system wide low power mode. 796 */ 797 struct ti_sci_msg_req_lpm_get_next_sys_mode { 798 struct ti_sci_msg_hdr hdr; 799 } __packed; 800 801 /** 802 * struct ti_sci_msg_resp_lpm_get_next_sys_mode - Response for TI_SCI_MSG_LPM_GET_NEXT_SYS_MODE. 803 * 804 * @hdr Generic Header 805 * @mode The selected system wide low power mode. 806 * 807 * Note: If the mode selection is not yet locked, this API returns "not selected" mode. 808 */ 809 struct ti_sci_msg_resp_lpm_get_next_sys_mode { 810 struct ti_sci_msg_hdr hdr; 811 uint8_t mode; 812 } __packed; 813 814 /** 815 * struct tisci_msg_boot_notification_msg - Response to TIFS boot notification 816 * 817 * This structure is used to consume the self initiated boot notification message 818 * from TIFS(TI Foundation Security) firmware which indicates that it is available. 819 * 820 * @hdr: Standard TISCI message header. 821 * @extboot_status: Status of extended boot. Applicable only for combined image 822 */ 823 struct tisci_msg_boot_notification_msg { 824 struct ti_sci_msg_hdr hdr; 825 uint32_t extboot_status; 826 } __packed; 827 828 #endif /* TI_SCI_PROTOCOL_H */ 829