xref: /rk3399_ARM-atf/drivers/ti/clk/include/ti_clk_pllctrl.h (revision 945de0f736703b42f64fbc1256fe1e1ed7749d3d)
1 /*
2  * Copyright (c) 2025-2026 Texas Instruments Incorporated - https://www.ti.com
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /*
8  * TI PLL Control API Header
9  *
10  * This header defines the interface for PLL control driver operations,
11  * including the read-only PLL control mux driver for monitoring PLL lock
12  * state and managing PLL bypass/lock-based clock path selection.
13  */
14 
15 #ifndef TI_CLK_PLLCTRL_H
16 #define TI_CLK_PLLCTRL_H
17 
18 #include <ti_clk_mux.h>
19 
20 /*
21  * Read-only PLL control mux driver
22  *
23  * Monitors PLL lock state and provides the current clock path selection
24  * between bypass and locked modes. Does not support dynamic mux switching,
25  * only reports the hardware-determined state based on PLL lock status.
26  */
27 extern const struct ti_clk_drv_mux ti_clk_drv_pllctrl_mux_reg_ro;
28 
29 #endif /* TI_CLK_PLLCTRL_H */
30