1 /* 2 * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <errno.h> 8 9 #include <libfdt.h> 10 11 #include <platform_def.h> 12 13 #include <common/debug.h> 14 #include <drivers/delay_timer.h> 15 #include <drivers/st/stm32_i2c.h> 16 #include <drivers/st/stm32mp_pmic.h> 17 #include <drivers/st/stpmic1.h> 18 #include <lib/mmio.h> 19 #include <lib/utils_def.h> 20 21 #define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2)) 22 #define STPMIC1_LDO12356_OUTPUT_SHIFT 2 23 #define STPMIC1_LDO3_MODE (uint8_t)(BIT(7)) 24 #define STPMIC1_LDO3_DDR_SEL 31U 25 #define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT) 26 27 #define STPMIC1_BUCK_OUTPUT_SHIFT 2 28 #define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT) 29 30 #define STPMIC1_DEFAULT_START_UP_DELAY_MS 1 31 32 static struct i2c_handle_s i2c_handle; 33 static uint32_t pmic_i2c_addr; 34 35 static int dt_get_pmic_node(void *fdt) 36 { 37 return fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1"); 38 } 39 40 int dt_pmic_status(void) 41 { 42 int node; 43 void *fdt; 44 45 if (fdt_get_address(&fdt) == 0) { 46 return -ENOENT; 47 } 48 49 node = dt_get_pmic_node(fdt); 50 if (node <= 0) { 51 return -FDT_ERR_NOTFOUND; 52 } 53 54 return fdt_get_status(node); 55 } 56 57 /* 58 * Get PMIC and its I2C bus configuration from the device tree. 59 * Return 0 on success, negative on error, 1 if no PMIC node is found. 60 */ 61 static int dt_pmic_i2c_config(struct dt_node_info *i2c_info, 62 struct stm32_i2c_init_s *init) 63 { 64 int pmic_node, i2c_node; 65 void *fdt; 66 const fdt32_t *cuint; 67 68 if (fdt_get_address(&fdt) == 0) { 69 return -ENOENT; 70 } 71 72 pmic_node = dt_get_pmic_node(fdt); 73 if (pmic_node < 0) { 74 return 1; 75 } 76 77 cuint = fdt_getprop(fdt, pmic_node, "reg", NULL); 78 if (cuint == NULL) { 79 return -FDT_ERR_NOTFOUND; 80 } 81 82 pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1; 83 if (pmic_i2c_addr > UINT16_MAX) { 84 return -EINVAL; 85 } 86 87 i2c_node = fdt_parent_offset(fdt, pmic_node); 88 if (i2c_node < 0) { 89 return -FDT_ERR_NOTFOUND; 90 } 91 92 dt_fill_device_info(i2c_info, i2c_node); 93 if (i2c_info->base == 0U) { 94 return -FDT_ERR_NOTFOUND; 95 } 96 97 return stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init); 98 } 99 100 int dt_pmic_configure_boot_on_regulators(void) 101 { 102 int pmic_node, regulators_node, regulator_node; 103 void *fdt; 104 105 if (fdt_get_address(&fdt) == 0) { 106 return -ENOENT; 107 } 108 109 pmic_node = dt_get_pmic_node(fdt); 110 if (pmic_node < 0) { 111 return -FDT_ERR_NOTFOUND; 112 } 113 114 regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators"); 115 116 fdt_for_each_subnode(regulator_node, fdt, regulators_node) { 117 const fdt32_t *cuint; 118 const char *node_name = fdt_get_name(fdt, regulator_node, NULL); 119 uint16_t voltage; 120 int status; 121 122 #if defined(IMAGE_BL2) 123 if ((fdt_getprop(fdt, regulator_node, "regulator-boot-on", 124 NULL) == NULL) && 125 (fdt_getprop(fdt, regulator_node, "regulator-always-on", 126 NULL) == NULL)) { 127 #else 128 if (fdt_getprop(fdt, regulator_node, "regulator-boot-on", 129 NULL) == NULL) { 130 #endif 131 continue; 132 } 133 134 if (fdt_getprop(fdt, regulator_node, "regulator-pull-down", 135 NULL) != NULL) { 136 137 status = stpmic1_regulator_pull_down_set(node_name); 138 if (status != 0) { 139 return status; 140 } 141 } 142 143 if (fdt_getprop(fdt, regulator_node, "st,mask-reset", 144 NULL) != NULL) { 145 146 status = stpmic1_regulator_mask_reset_set(node_name); 147 if (status != 0) { 148 return status; 149 } 150 } 151 152 cuint = fdt_getprop(fdt, regulator_node, 153 "regulator-min-microvolt", NULL); 154 if (cuint == NULL) { 155 continue; 156 } 157 158 /* DT uses microvolts, whereas driver awaits millivolts */ 159 voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U); 160 161 status = stpmic1_regulator_voltage_set(node_name, voltage); 162 if (status != 0) { 163 return status; 164 } 165 166 if (stpmic1_is_regulator_enabled(node_name) == 0U) { 167 status = stpmic1_regulator_enable(node_name); 168 if (status != 0) { 169 return status; 170 } 171 } 172 } 173 174 return 0; 175 } 176 177 bool initialize_pmic_i2c(void) 178 { 179 int ret; 180 struct dt_node_info i2c_info; 181 struct i2c_handle_s *i2c = &i2c_handle; 182 struct stm32_i2c_init_s i2c_init; 183 184 ret = dt_pmic_i2c_config(&i2c_info, &i2c_init); 185 if (ret < 0) { 186 ERROR("I2C configuration failed %d\n", ret); 187 panic(); 188 } 189 190 if (ret != 0) { 191 return false; 192 } 193 194 /* Initialize PMIC I2C */ 195 i2c->i2c_base_addr = i2c_info.base; 196 i2c->dt_status = i2c_info.status; 197 i2c->clock = i2c_info.clock; 198 i2c_init.own_address1 = pmic_i2c_addr; 199 i2c_init.addressing_mode = I2C_ADDRESSINGMODE_7BIT; 200 i2c_init.dual_address_mode = I2C_DUALADDRESS_DISABLE; 201 i2c_init.own_address2 = 0; 202 i2c_init.own_address2_masks = I2C_OAR2_OA2NOMASK; 203 i2c_init.general_call_mode = I2C_GENERALCALL_DISABLE; 204 i2c_init.no_stretch_mode = I2C_NOSTRETCH_DISABLE; 205 i2c_init.analog_filter = 1; 206 i2c_init.digital_filter_coef = 0; 207 208 ret = stm32_i2c_init(i2c, &i2c_init); 209 if (ret != 0) { 210 ERROR("Cannot initialize I2C %x (%d)\n", 211 i2c->i2c_base_addr, ret); 212 panic(); 213 } 214 215 if (!stm32_i2c_is_device_ready(i2c, pmic_i2c_addr, 1, 216 I2C_TIMEOUT_BUSY_MS)) { 217 ERROR("I2C device not ready\n"); 218 panic(); 219 } 220 221 stpmic1_bind_i2c(i2c, (uint16_t)pmic_i2c_addr); 222 223 return true; 224 } 225 226 void initialize_pmic(void) 227 { 228 unsigned long pmic_version; 229 230 if (!initialize_pmic_i2c()) { 231 VERBOSE("No PMIC\n"); 232 return; 233 } 234 235 if (stpmic1_get_version(&pmic_version) != 0) { 236 ERROR("Failed to access PMIC\n"); 237 panic(); 238 } 239 240 INFO("PMIC version = 0x%02lx\n", pmic_version); 241 stpmic1_dump_regulators(); 242 243 #if defined(IMAGE_BL2) 244 if (dt_pmic_configure_boot_on_regulators() != 0) { 245 panic(); 246 }; 247 #endif 248 } 249 250 int pmic_ddr_power_init(enum ddr_type ddr_type) 251 { 252 bool buck3_at_1v8 = false; 253 uint8_t read_val; 254 int status; 255 256 switch (ddr_type) { 257 case STM32MP_DDR3: 258 /* Set LDO3 to sync mode */ 259 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 260 if (status != 0) { 261 return status; 262 } 263 264 read_val &= ~STPMIC1_LDO3_MODE; 265 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 266 read_val |= STPMIC1_LDO3_DDR_SEL << 267 STPMIC1_LDO12356_OUTPUT_SHIFT; 268 269 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 270 if (status != 0) { 271 return status; 272 } 273 274 status = stpmic1_regulator_voltage_set("buck2", 1350); 275 if (status != 0) { 276 return status; 277 } 278 279 status = stpmic1_regulator_enable("buck2"); 280 if (status != 0) { 281 return status; 282 } 283 284 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 285 286 status = stpmic1_regulator_enable("vref_ddr"); 287 if (status != 0) { 288 return status; 289 } 290 291 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 292 293 status = stpmic1_regulator_enable("ldo3"); 294 if (status != 0) { 295 return status; 296 } 297 298 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 299 break; 300 301 case STM32MP_LPDDR2: 302 case STM32MP_LPDDR3: 303 /* 304 * Set LDO3 to 1.8V 305 * Set LDO3 to bypass mode if BUCK3 = 1.8V 306 * Set LDO3 to normal mode if BUCK3 != 1.8V 307 */ 308 status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val); 309 if (status != 0) { 310 return status; 311 } 312 313 if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) { 314 buck3_at_1v8 = true; 315 } 316 317 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 318 if (status != 0) { 319 return status; 320 } 321 322 read_val &= ~STPMIC1_LDO3_MODE; 323 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 324 read_val |= STPMIC1_LDO3_1800000; 325 if (buck3_at_1v8) { 326 read_val |= STPMIC1_LDO3_MODE; 327 } 328 329 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 330 if (status != 0) { 331 return status; 332 } 333 334 status = stpmic1_regulator_voltage_set("buck2", 1200); 335 if (status != 0) { 336 return status; 337 } 338 339 status = stpmic1_regulator_enable("ldo3"); 340 if (status != 0) { 341 return status; 342 } 343 344 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 345 346 status = stpmic1_regulator_enable("buck2"); 347 if (status != 0) { 348 return status; 349 } 350 351 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 352 353 status = stpmic1_regulator_enable("vref_ddr"); 354 if (status != 0) { 355 return status; 356 } 357 358 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 359 break; 360 361 default: 362 break; 363 }; 364 365 return 0; 366 } 367