1 /* 2 * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <errno.h> 8 9 #include <libfdt.h> 10 11 #include <platform_def.h> 12 13 #include <common/debug.h> 14 #include <drivers/delay_timer.h> 15 #include <drivers/st/stm32_i2c.h> 16 #include <drivers/st/stm32mp_pmic.h> 17 #include <drivers/st/stpmic1.h> 18 #include <lib/mmio.h> 19 #include <lib/utils_def.h> 20 21 #define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2)) 22 #define STPMIC1_LDO12356_OUTPUT_SHIFT 2 23 #define STPMIC1_LDO3_MODE (uint8_t)(BIT(7)) 24 #define STPMIC1_LDO3_DDR_SEL 31U 25 #define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT) 26 27 #define STPMIC1_BUCK_OUTPUT_SHIFT 2 28 #define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT) 29 30 #define STPMIC1_DEFAULT_START_UP_DELAY_MS 1 31 32 static struct i2c_handle_s i2c_handle; 33 static uint32_t pmic_i2c_addr; 34 35 static int dt_get_pmic_node(void *fdt) 36 { 37 return fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1"); 38 } 39 40 int dt_pmic_status(void) 41 { 42 int node; 43 void *fdt; 44 45 if (fdt_get_address(&fdt) == 0) { 46 return -ENOENT; 47 } 48 49 node = dt_get_pmic_node(fdt); 50 if (node <= 0) { 51 return -FDT_ERR_NOTFOUND; 52 } 53 54 return fdt_get_status(node); 55 } 56 57 static bool dt_pmic_is_secure(void) 58 { 59 int status = dt_pmic_status(); 60 61 return (status >= 0) && 62 (status == DT_SECURE) && 63 (i2c_handle.dt_status == DT_SECURE); 64 } 65 66 /* 67 * Get PMIC and its I2C bus configuration from the device tree. 68 * Return 0 on success, negative on error, 1 if no PMIC node is found. 69 */ 70 static int dt_pmic_i2c_config(struct dt_node_info *i2c_info, 71 struct stm32_i2c_init_s *init) 72 { 73 int pmic_node, i2c_node; 74 void *fdt; 75 const fdt32_t *cuint; 76 77 if (fdt_get_address(&fdt) == 0) { 78 return -ENOENT; 79 } 80 81 pmic_node = dt_get_pmic_node(fdt); 82 if (pmic_node < 0) { 83 return 1; 84 } 85 86 cuint = fdt_getprop(fdt, pmic_node, "reg", NULL); 87 if (cuint == NULL) { 88 return -FDT_ERR_NOTFOUND; 89 } 90 91 pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1; 92 if (pmic_i2c_addr > UINT16_MAX) { 93 return -EINVAL; 94 } 95 96 i2c_node = fdt_parent_offset(fdt, pmic_node); 97 if (i2c_node < 0) { 98 return -FDT_ERR_NOTFOUND; 99 } 100 101 dt_fill_device_info(i2c_info, i2c_node); 102 if (i2c_info->base == 0U) { 103 return -FDT_ERR_NOTFOUND; 104 } 105 106 return stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init); 107 } 108 109 int dt_pmic_configure_boot_on_regulators(void) 110 { 111 int pmic_node, regulators_node, regulator_node; 112 void *fdt; 113 114 if (fdt_get_address(&fdt) == 0) { 115 return -ENOENT; 116 } 117 118 pmic_node = dt_get_pmic_node(fdt); 119 if (pmic_node < 0) { 120 return -FDT_ERR_NOTFOUND; 121 } 122 123 regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators"); 124 125 fdt_for_each_subnode(regulator_node, fdt, regulators_node) { 126 const fdt32_t *cuint; 127 const char *node_name = fdt_get_name(fdt, regulator_node, NULL); 128 uint16_t voltage; 129 int status; 130 131 #if defined(IMAGE_BL2) 132 if ((fdt_getprop(fdt, regulator_node, "regulator-boot-on", 133 NULL) == NULL) && 134 (fdt_getprop(fdt, regulator_node, "regulator-always-on", 135 NULL) == NULL)) { 136 #else 137 if (fdt_getprop(fdt, regulator_node, "regulator-boot-on", 138 NULL) == NULL) { 139 #endif 140 continue; 141 } 142 143 if (fdt_getprop(fdt, regulator_node, "regulator-pull-down", 144 NULL) != NULL) { 145 146 status = stpmic1_regulator_pull_down_set(node_name); 147 if (status != 0) { 148 return status; 149 } 150 } 151 152 if (fdt_getprop(fdt, regulator_node, "st,mask-reset", 153 NULL) != NULL) { 154 155 status = stpmic1_regulator_mask_reset_set(node_name); 156 if (status != 0) { 157 return status; 158 } 159 } 160 161 cuint = fdt_getprop(fdt, regulator_node, 162 "regulator-min-microvolt", NULL); 163 if (cuint == NULL) { 164 continue; 165 } 166 167 /* DT uses microvolts, whereas driver awaits millivolts */ 168 voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U); 169 170 status = stpmic1_regulator_voltage_set(node_name, voltage); 171 if (status != 0) { 172 return status; 173 } 174 175 if (stpmic1_is_regulator_enabled(node_name) == 0U) { 176 status = stpmic1_regulator_enable(node_name); 177 if (status != 0) { 178 return status; 179 } 180 } 181 } 182 183 return 0; 184 } 185 186 bool initialize_pmic_i2c(void) 187 { 188 int ret; 189 struct dt_node_info i2c_info; 190 struct i2c_handle_s *i2c = &i2c_handle; 191 struct stm32_i2c_init_s i2c_init; 192 193 ret = dt_pmic_i2c_config(&i2c_info, &i2c_init); 194 if (ret < 0) { 195 ERROR("I2C configuration failed %d\n", ret); 196 panic(); 197 } 198 199 if (ret != 0) { 200 return false; 201 } 202 203 /* Initialize PMIC I2C */ 204 i2c->i2c_base_addr = i2c_info.base; 205 i2c->dt_status = i2c_info.status; 206 i2c->clock = i2c_info.clock; 207 i2c->i2c_state = I2C_STATE_RESET; 208 i2c_init.own_address1 = pmic_i2c_addr; 209 i2c_init.addressing_mode = I2C_ADDRESSINGMODE_7BIT; 210 i2c_init.dual_address_mode = I2C_DUALADDRESS_DISABLE; 211 i2c_init.own_address2 = 0; 212 i2c_init.own_address2_masks = I2C_OAR2_OA2NOMASK; 213 i2c_init.general_call_mode = I2C_GENERALCALL_DISABLE; 214 i2c_init.no_stretch_mode = I2C_NOSTRETCH_DISABLE; 215 i2c_init.analog_filter = 1; 216 i2c_init.digital_filter_coef = 0; 217 218 ret = stm32_i2c_init(i2c, &i2c_init); 219 if (ret != 0) { 220 ERROR("Cannot initialize I2C %x (%d)\n", 221 i2c->i2c_base_addr, ret); 222 panic(); 223 } 224 225 if (!stm32_i2c_is_device_ready(i2c, pmic_i2c_addr, 1, 226 I2C_TIMEOUT_BUSY_MS)) { 227 ERROR("I2C device not ready\n"); 228 panic(); 229 } 230 231 stpmic1_bind_i2c(i2c, (uint16_t)pmic_i2c_addr); 232 233 return true; 234 } 235 236 static void register_pmic_shared_peripherals(void) 237 { 238 uintptr_t i2c_base = i2c_handle.i2c_base_addr; 239 240 if (dt_pmic_is_secure()) { 241 stm32mp_register_secure_periph_iomem(i2c_base); 242 } else { 243 if (i2c_base != 0U) { 244 stm32mp_register_non_secure_periph_iomem(i2c_base); 245 } 246 } 247 } 248 249 void initialize_pmic(void) 250 { 251 unsigned long pmic_version; 252 253 if (!initialize_pmic_i2c()) { 254 VERBOSE("No PMIC\n"); 255 return; 256 } 257 258 register_pmic_shared_peripherals(); 259 260 if (stpmic1_get_version(&pmic_version) != 0) { 261 ERROR("Failed to access PMIC\n"); 262 panic(); 263 } 264 265 INFO("PMIC version = 0x%02lx\n", pmic_version); 266 stpmic1_dump_regulators(); 267 268 #if defined(IMAGE_BL2) 269 if (dt_pmic_configure_boot_on_regulators() != 0) { 270 panic(); 271 }; 272 #endif 273 } 274 275 int pmic_ddr_power_init(enum ddr_type ddr_type) 276 { 277 bool buck3_at_1v8 = false; 278 uint8_t read_val; 279 int status; 280 281 switch (ddr_type) { 282 case STM32MP_DDR3: 283 /* Set LDO3 to sync mode */ 284 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 285 if (status != 0) { 286 return status; 287 } 288 289 read_val &= ~STPMIC1_LDO3_MODE; 290 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 291 read_val |= STPMIC1_LDO3_DDR_SEL << 292 STPMIC1_LDO12356_OUTPUT_SHIFT; 293 294 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 295 if (status != 0) { 296 return status; 297 } 298 299 status = stpmic1_regulator_voltage_set("buck2", 1350); 300 if (status != 0) { 301 return status; 302 } 303 304 status = stpmic1_regulator_enable("buck2"); 305 if (status != 0) { 306 return status; 307 } 308 309 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 310 311 status = stpmic1_regulator_enable("vref_ddr"); 312 if (status != 0) { 313 return status; 314 } 315 316 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 317 318 status = stpmic1_regulator_enable("ldo3"); 319 if (status != 0) { 320 return status; 321 } 322 323 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 324 break; 325 326 case STM32MP_LPDDR2: 327 case STM32MP_LPDDR3: 328 /* 329 * Set LDO3 to 1.8V 330 * Set LDO3 to bypass mode if BUCK3 = 1.8V 331 * Set LDO3 to normal mode if BUCK3 != 1.8V 332 */ 333 status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val); 334 if (status != 0) { 335 return status; 336 } 337 338 if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) { 339 buck3_at_1v8 = true; 340 } 341 342 status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); 343 if (status != 0) { 344 return status; 345 } 346 347 read_val &= ~STPMIC1_LDO3_MODE; 348 read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; 349 read_val |= STPMIC1_LDO3_1800000; 350 if (buck3_at_1v8) { 351 read_val |= STPMIC1_LDO3_MODE; 352 } 353 354 status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); 355 if (status != 0) { 356 return status; 357 } 358 359 status = stpmic1_regulator_voltage_set("buck2", 1200); 360 if (status != 0) { 361 return status; 362 } 363 364 status = stpmic1_regulator_enable("ldo3"); 365 if (status != 0) { 366 return status; 367 } 368 369 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 370 371 status = stpmic1_regulator_enable("buck2"); 372 if (status != 0) { 373 return status; 374 } 375 376 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 377 378 status = stpmic1_regulator_enable("vref_ddr"); 379 if (status != 0) { 380 return status; 381 } 382 383 mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); 384 break; 385 386 default: 387 break; 388 }; 389 390 return 0; 391 } 392