1 /* 2 * Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <stdbool.h> 8 9 #include <common/bl_common.h> 10 #include <common/debug.h> 11 #include <drivers/st/stm32_gpio.h> 12 #include <lib/mmio.h> 13 14 static bool check_gpio(uint32_t bank, uint32_t pin) 15 { 16 if (pin > GPIO_PIN_MAX) { 17 ERROR("%s: wrong pin number (%d)\n", __func__, pin); 18 return false; 19 } 20 21 if ((bank > GPIO_BANK_K) && (bank != GPIO_BANK_Z)) { 22 ERROR("%s: wrong GPIO bank number (%d)\n", __func__, bank); 23 return false; 24 } 25 26 return true; 27 } 28 29 void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t speed, 30 uint32_t pull, uint32_t alternate) 31 { 32 uintptr_t base; 33 34 if (!check_gpio(bank, pin)) { 35 return; 36 } 37 38 if (bank == GPIO_BANK_Z) { 39 base = STM32_GPIOZ_BANK; 40 } else { 41 base = STM32_GPIOA_BANK + 42 (bank * STM32_GPIO_BANK_OFFSET); 43 } 44 45 mmio_clrbits_32(base + GPIO_MODE_OFFSET, 46 ((uint32_t)GPIO_MODE_MASK << (pin << 1))); 47 mmio_setbits_32(base + GPIO_MODE_OFFSET, 48 (mode & ~GPIO_OPEN_DRAIN) << (pin << 1)); 49 50 if ((mode & GPIO_OPEN_DRAIN) != 0U) { 51 mmio_setbits_32(base + GPIO_TYPE_OFFSET, BIT(pin)); 52 } else { 53 mmio_clrbits_32(base + GPIO_TYPE_OFFSET, BIT(pin)); 54 } 55 56 mmio_clrbits_32(base + GPIO_SPEED_OFFSET, 57 ((uint32_t)GPIO_SPEED_MASK << (pin << 1))); 58 mmio_setbits_32(base + GPIO_SPEED_OFFSET, speed << (pin << 1)); 59 60 mmio_clrbits_32(base + GPIO_PUPD_OFFSET, 61 ((uint32_t)GPIO_PULL_MASK << (pin << 1))); 62 mmio_setbits_32(base + GPIO_PUPD_OFFSET, pull << (pin << 1)); 63 64 if (pin < GPIO_ALT_LOWER_LIMIT) { 65 mmio_clrbits_32(base + GPIO_AFRL_OFFSET, 66 ((uint32_t)GPIO_ALTERNATE_MASK << (pin << 2))); 67 mmio_setbits_32(base + GPIO_AFRL_OFFSET, 68 alternate << (pin << 2)); 69 } else { 70 mmio_clrbits_32(base + GPIO_AFRH_OFFSET, 71 ((uint32_t)GPIO_ALTERNATE_MASK << 72 ((pin - GPIO_ALT_LOWER_LIMIT) << 2))); 73 mmio_setbits_32(base + GPIO_AFRH_OFFSET, 74 alternate << ((pin - GPIO_ALT_LOWER_LIMIT) << 75 2)); 76 } 77 78 VERBOSE("GPIO %u mode set to 0x%x\n", bank, 79 mmio_read_32(base + GPIO_MODE_OFFSET)); 80 VERBOSE("GPIO %u speed set to 0x%x\n", bank, 81 mmio_read_32(base + GPIO_SPEED_OFFSET)); 82 VERBOSE("GPIO %u mode pull to 0x%x\n", bank, 83 mmio_read_32(base + GPIO_PUPD_OFFSET)); 84 VERBOSE("GPIO %u mode alternate low to 0x%x\n", bank, 85 mmio_read_32(base + GPIO_AFRL_OFFSET)); 86 VERBOSE("GPIO %u mode alternate high to 0x%x\n", bank, 87 mmio_read_32(base + GPIO_AFRH_OFFSET)); 88 } 89