1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights reserved. 4 * Copyright (c) 2019, Linaro Limited 5 */ 6 7 #ifndef SCMI_MSG_CLOCK_H 8 #define SCMI_MSG_CLOCK_H 9 10 #include <stdint.h> 11 12 #include <lib/utils_def.h> 13 14 #define SCMI_PROTOCOL_VERSION_CLOCK 0x30000U 15 16 /* 17 * Identifiers of the SCMI Clock Management Protocol commands 18 */ 19 enum scmi_clock_command_id { 20 SCMI_CLOCK_ATTRIBUTES = 0x003, 21 SCMI_CLOCK_DESCRIBE_RATES = 0x004, 22 SCMI_CLOCK_RATE_SET = 0x005, 23 SCMI_CLOCK_RATE_GET = 0x006, 24 SCMI_CLOCK_CONFIG_SET = 0x007, 25 SCMI_CLOCK_CONFIG_GET = 0x00B, 26 SCMI_CLOCK_POSSIBLE_PARENTS_GET = 0xC, 27 SCMI_CLOCK_PARENT_SET = 0xD, 28 SCMI_CLOCK_PARENT_GET = 0xE, 29 }; 30 31 /* Protocol attributes */ 32 #define SCMI_CLOCK_CLOCK_COUNT_MASK GENMASK(15, 0) 33 #define SCMI_CLOCK_MAX_PENDING_TRANSITIONS_MASK GENMASK(23, 16) 34 35 #define SCMI_CLOCK_PROTOCOL_ATTRIBUTES(_max_pending, _clk_count) \ 36 ((((_max_pending) << 16) & SCMI_CLOCK_MAX_PENDING_TRANSITIONS_MASK) | \ 37 (((_clk_count) & SCMI_CLOCK_CLOCK_COUNT_MASK))) 38 39 struct scmi_clock_attributes_a2p { 40 uint32_t clock_id; 41 }; 42 43 #define SCMI_CLOCK_NAME_LENGTH_MAX 16U 44 45 struct scmi_clock_attributes_p2a { 46 int32_t status; 47 uint32_t attributes; 48 char clock_name[SCMI_CLOCK_NAME_LENGTH_MAX]; 49 uint32_t clock_enable_delay; 50 }; 51 52 /* 53 * Clock Rate Get 54 */ 55 56 struct scmi_clock_rate_get_a2p { 57 uint32_t clock_id; 58 }; 59 60 struct scmi_clock_rate_get_p2a { 61 int32_t status; 62 uint32_t rate[2]; 63 }; 64 65 /* 66 * Clock Rate Set 67 */ 68 69 /* If set, set the new clock rate asynchronously */ 70 #define SCMI_CLOCK_RATE_SET_ASYNC_POS 0 71 /* If set, do not send a delayed asynchronous response */ 72 #define SCMI_CLOCK_RATE_SET_NO_DELAYED_RESPONSE_POS 1 73 /* Round up, if set, otherwise round down */ 74 #define SCMI_CLOCK_RATE_SET_ROUND_UP_POS 2 75 /* If set, the platform chooses the appropriate rounding mode */ 76 #define SCMI_CLOCK_RATE_SET_ROUND_AUTO_POS 3 77 78 #define SCMI_CLOCK_RATE_SET_ASYNC_MASK \ 79 BIT(SCMI_CLOCK_RATE_SET_ASYNC_POS) 80 #define SCMI_CLOCK_RATE_SET_NO_DELAYED_RESPONSE_MASK \ 81 BIT(SCMI_CLOCK_RATE_SET_NO_DELAYED_RESPONSE_POS) 82 #define SCMI_CLOCK_RATE_SET_ROUND_UP_MASK \ 83 BIT(SCMI_CLOCK_RATE_SET_ROUND_UP_POS) 84 #define SCMI_CLOCK_RATE_SET_ROUND_AUTO_MASK \ 85 BIT(SCMI_CLOCK_RATE_SET_ROUND_AUTO_POS) 86 87 struct scmi_clock_rate_set_a2p { 88 uint32_t flags; 89 uint32_t clock_id; 90 uint32_t rate[2]; 91 }; 92 93 struct scmi_clock_rate_set_p2a { 94 int32_t status; 95 }; 96 97 /* 98 * Clock Config Set 99 */ 100 101 #define SCMI_CLOCK_CONFIG_SET_ENABLE_MASK GENMASK_32(1, 0) 102 #define SCMI_CLOCK_EXTENDED_CONFIG_SET_TYPE_MASK GENMASK_32(23, 16) 103 #define SCMI_CLOCK_CONFIG_SET_RESERVED_STATE 2U 104 /* If extended config is supported and being actively used, config_set allows 105 * updating extended configuration parameters while preserving the current 106 * clock state (enabled/disabled remains unchanged). 107 */ 108 #define SCMI_CLOCK_CONFIG_SET_UNCHANGED_STATE 3U 109 110 111 struct scmi_clock_config_set_a2p { 112 uint32_t clock_id; 113 uint32_t attributes; 114 uint32_t extended_config_val; 115 }; 116 117 struct scmi_clock_config_set_p2a { 118 int32_t status; 119 }; 120 121 /* 122 * Clock Config Get 123 */ 124 125 #define SCMI_CLOCK_EXTENDED_CONFIG_SUPPORT_POS 27 126 #define SCMI_CLOCK_EXTENDED_CONFIG_GET_TYPE_MASK GENMASK_32(7, 0) 127 128 struct scmi_clock_config_get_a2p { 129 uint32_t clock_id; 130 uint32_t flags; 131 }; 132 133 struct scmi_clock_config_get_p2a { 134 int32_t status; 135 uint32_t attributes; 136 uint32_t config; 137 uint32_t extended_config_val; 138 }; 139 140 /* 141 * Clock Possible Parents 142 */ 143 struct scmi_clock_possible_parents_get_a2p { 144 uint32_t clock_id; 145 uint32_t skip_parents; 146 }; 147 148 struct scmi_clock_possible_parents_get_p2a { 149 int32_t status; 150 uint32_t flags; 151 uint32_t possible_parents[]; 152 }; 153 154 /* 155 * Clock Parent Get 156 */ 157 #define SCMI_CLOCK_PARENT_IDENTIFIER_SUPPORT_POS 28 158 159 struct scmi_clock_parent_get_a2p { 160 uint32_t clock_id; 161 }; 162 163 struct scmi_clock_parent_get_p2a { 164 int32_t status; 165 uint32_t parent_id; 166 }; 167 168 /* 169 * Clock Parent Set 170 */ 171 struct scmi_clock_parent_set_a2p { 172 uint32_t clock_id; 173 uint32_t parent_id; 174 }; 175 176 struct scmi_clock_parent_set_p2a { 177 int32_t status; 178 }; 179 180 /* 181 * Clock Describe Rates 182 */ 183 184 #define SCMI_CLOCK_RATE_FORMAT_RANGE 1U 185 #define SCMI_CLOCK_RATE_FORMAT_LIST 0U 186 187 #define SCMI_CLOCK_DESCRIBE_RATES_REMAINING_MASK GENMASK_32(31, 16) 188 #define SCMI_CLOCK_DESCRIBE_RATES_REMAINING_POS 16 189 190 #define SCMI_CLOCK_DESCRIBE_RATES_FORMAT_MASK BIT(12) 191 #define SCMI_CLOCK_DESCRIBE_RATES_FORMAT_POS 12 192 193 #define SCMI_CLOCK_DESCRIBE_RATES_COUNT_MASK GENMASK_32(11, 0) 194 195 #define SCMI_CLOCK_DESCRIBE_RATES_NUM_RATES_FLAGS(_count, _fmt, _rem_rates) \ 196 ( \ 197 ((_count) & SCMI_CLOCK_DESCRIBE_RATES_COUNT_MASK) | \ 198 (((_rem_rates) << SCMI_CLOCK_DESCRIBE_RATES_REMAINING_POS) & \ 199 SCMI_CLOCK_DESCRIBE_RATES_REMAINING_MASK) | \ 200 (((_fmt) << SCMI_CLOCK_DESCRIBE_RATES_FORMAT_POS) & \ 201 SCMI_CLOCK_DESCRIBE_RATES_FORMAT_MASK) \ 202 ) 203 204 struct scmi_clock_rate { 205 uint32_t low; 206 uint32_t high; 207 }; 208 209 struct scmi_clock_describe_rates_a2p { 210 uint32_t clock_id; 211 uint32_t rate_index; 212 }; 213 214 struct scmi_clock_describe_rates_p2a { 215 int32_t status; 216 uint32_t num_rates_flags; 217 struct scmi_clock_rate rates[]; 218 }; 219 220 #endif /* SCMI_MSG_CLOCK_H */ 221