1 /* 2 * Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <stdint.h> 8 9 #include <lib/mmio.h> 10 #include <lib/utils_def.h> 11 12 #include "board.h" 13 #include "rcar_def.h" 14 15 #ifndef BOARD_DEFAULT 16 #if (RCAR_LSI == RZ_G2H) 17 #define BOARD_DEFAULT (BOARD_HIHOPE_RZ_G2H << BOARD_CODE_SHIFT) 18 #elif (RCAR_LSI == RZ_G2N) 19 #define BOARD_DEFAULT (BOARD_HIHOPE_RZ_G2N << BOARD_CODE_SHIFT) 20 #elif (RCAR_LSI == RZ_G2E) 21 #define BOARD_DEFAULT (BOARD_EK874_RZ_G2E << BOARD_CODE_SHIFT) 22 #else 23 #define BOARD_DEFAULT (BOARD_HIHOPE_RZ_G2M << BOARD_CODE_SHIFT) 24 #endif /* RCAR_LSI == RZ_G2H */ 25 #endif /* BOARD_DEFAULT */ 26 27 #define BOARD_CODE_MASK (0xF8U) 28 #define BOARD_REV_MASK (0x07U) 29 #define BOARD_CODE_SHIFT (0x03) 30 #define BOARD_ID_UNKNOWN (0xFFU) 31 32 #define GPIO_INDT5 0xE605500C 33 #define GP5_19_BIT (0x01U << 19) 34 #define GP5_21_BIT (0x01U << 21) 35 #define GP5_25_BIT (0x01U << 25) 36 37 #define HM_ID { 0x10U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU } 38 #define HH_ID HM_ID 39 #define HN_ID { 0x20U, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU } 40 #define EK_ID HM_ID 41 42 const char *g_board_tbl[] = { 43 [BOARD_HIHOPE_RZ_G2M] = "HiHope RZ/G2M", 44 [BOARD_HIHOPE_RZ_G2H] = "HiHope RZ/G2H", 45 [BOARD_HIHOPE_RZ_G2N] = "HiHope RZ/G2N", 46 [BOARD_EK874_RZ_G2E] = "EK874 RZ/G2E", 47 [BOARD_UNKNOWN] = "unknown" 48 }; 49 50 void rzg_get_board_type(uint32_t *type, uint32_t *rev) 51 { 52 static uint8_t board_id = BOARD_ID_UNKNOWN; 53 const uint8_t board_tbl[][8] = { 54 [BOARD_HIHOPE_RZ_G2M] = HM_ID, 55 [BOARD_HIHOPE_RZ_G2H] = HH_ID, 56 [BOARD_HIHOPE_RZ_G2N] = HN_ID, 57 [BOARD_EK874_RZ_G2E] = EK_ID, 58 }; 59 uint32_t reg; 60 #if (RCAR_LSI != RZ_G2E) 61 uint32_t boardInfo; 62 #endif /* RCAR_LSI == RZ_G2E */ 63 64 if (board_id == BOARD_ID_UNKNOWN) { 65 board_id = BOARD_DEFAULT; 66 } 67 68 *type = ((uint32_t) board_id & BOARD_CODE_MASK) >> BOARD_CODE_SHIFT; 69 70 if (*type >= ARRAY_SIZE(board_tbl)) { 71 /* no revision information, set Rev0.0. */ 72 *rev = 0; 73 return; 74 } 75 76 reg = mmio_read_32(RCAR_PRR); 77 #if (RCAR_LSI == RZ_G2E) 78 if (reg & RCAR_MINOR_MASK) { 79 *rev = 0x30U; 80 } else { 81 *rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)]; 82 } 83 #else 84 if ((reg & PRR_CUT_MASK) == RCAR_M3_CUT_VER11) { 85 *rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)]; 86 } else { 87 reg = mmio_read_32(GPIO_INDT5); 88 if (reg & GP5_25_BIT) { 89 *rev = board_tbl[*type][(uint8_t)(board_id & BOARD_REV_MASK)]; 90 } else { 91 boardInfo = reg & (GP5_19_BIT | GP5_21_BIT); 92 *rev = (((boardInfo & GP5_19_BIT) >> 14) | 93 ((boardInfo & GP5_21_BIT) >> 17)) + 0x30U; 94 } 95 } 96 #endif /* RCAR_LSI == RZ_G2E */ 97 } 98