1 /* 2 * Copyright (c) 2025, Renesas Electronics Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <arch.h> 10 #include <lib/mmio.h> 11 #include <plat/common/platform.h> 12 13 #include "rcar_def.h" 14 #include "rcar_private.h" 15 16 #define RCAR_CNTCVL_OFF (0x08U) 17 #define RCAR_CNTCVU_OFF (0x0CU) 18 19 static uint64_t rcar_pwrc_saved_cntpct_el0; 20 static uint32_t rcar_pwrc_saved_cntfid; 21 22 void rcar_pwrc_save_timer_state(void) 23 { 24 rcar_pwrc_saved_cntpct_el0 = read_cntpct_el0(); 25 26 rcar_pwrc_saved_cntfid = 27 mmio_read_32((uintptr_t)(RCAR_CNTC_BASE + CNTFID_OFF)); 28 } 29 30 void rcar_pwrc_restore_timer_state(void) 31 { 32 /* Stop timer before restoring counter value */ 33 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + CNTCR_OFF), 0U); 34 35 /* restore lower counter value */ 36 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVL_OFF), 37 (uint32_t)(rcar_pwrc_saved_cntpct_el0 & 0xFFFFFFFFU)); 38 /* restore upper counter value */ 39 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVU_OFF), 40 (uint32_t)(rcar_pwrc_saved_cntpct_el0 >> 32U)); 41 /* restore counter frequency setting */ 42 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + CNTFID_OFF), 43 rcar_pwrc_saved_cntfid); 44 45 /* Start generic timer back */ 46 write_cntfrq_el0((u_register_t)plat_get_syscnt_freq2()); 47 48 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + CNTCR_OFF), 49 CNTCR_FCREQ((uint32_t)(0)) | CNTCR_EN); 50 } 51