1c40739a6SBiju Das /* 2*92196d4fSMarek Vasut * Copyright (c) 2015-2025, Renesas Electronics Corporation. All rights reserved. 3c40739a6SBiju Das * 4c40739a6SBiju Das * SPDX-License-Identifier: BSD-3-Clause 5c40739a6SBiju Das */ 6c40739a6SBiju Das 7c40739a6SBiju Das #ifndef PWRC_H 8c40739a6SBiju Das #define PWRC_H 9c40739a6SBiju Das 10c40739a6SBiju Das #define PPOFFR_OFF 0x0 11c40739a6SBiju Das #define PPONR_OFF 0x4 12c40739a6SBiju Das #define PCOFFR_OFF 0x8 13c40739a6SBiju Das #define PWKUPR_OFF 0xc 14c40739a6SBiju Das #define PSYSR_OFF 0x10 15c40739a6SBiju Das 16c40739a6SBiju Das #define PWKUPR_WEN (1ull << 31) 17c40739a6SBiju Das 18c40739a6SBiju Das #define PSYSR_AFF_L2 (1U << 31) 19c40739a6SBiju Das #define PSYSR_AFF_L1 (1 << 30) 20c40739a6SBiju Das #define PSYSR_AFF_L0 (1 << 29) 21c40739a6SBiju Das #define PSYSR_WEN (1 << 28) 22c40739a6SBiju Das #define PSYSR_PC (1 << 27) 23c40739a6SBiju Das #define PSYSR_PP (1 << 26) 24c40739a6SBiju Das 25c40739a6SBiju Das #define PSYSR_WK_SHIFT (24) 26c40739a6SBiju Das #define PSYSR_WK_MASK (0x3) 27c40739a6SBiju Das #define PSYSR_WK(x) (((x) >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK) 28c40739a6SBiju Das 29c40739a6SBiju Das #define WKUP_COLD 0x0 30c40739a6SBiju Das #define WKUP_RESET 0x1 31c40739a6SBiju Das #define WKUP_PPONR 0x2 32c40739a6SBiju Das #define WKUP_GICREQ 0x3 33c40739a6SBiju Das 34c40739a6SBiju Das #define RCAR_INVALID (0xffffffffU) 35c40739a6SBiju Das #define PSYSR_INVALID 0xffffffff 36c40739a6SBiju Das 37c40739a6SBiju Das #define RCAR_CLUSTER_A53A57 (0U) 38c40739a6SBiju Das #define RCAR_CLUSTER_CA53 (1U) 39c40739a6SBiju Das #define RCAR_CLUSTER_CA57 (2U) 40c40739a6SBiju Das 41d9912cf3STakuya Sakata extern u_register_t rcar_boot_mpidr; 42d9912cf3STakuya Sakata 43c40739a6SBiju Das #ifndef __ASSEMBLER__ 44ffb725beSTakuya Sakata void rcar_pwrc_disable_interrupt_wakeup(u_register_t mpidr); 45ffb725beSTakuya Sakata void rcar_pwrc_enable_interrupt_wakeup(u_register_t mpidr); 46d9912cf3STakuya Sakata void rcar_pwrc_all_disable_interrupt_wakeup(void); 47ffb725beSTakuya Sakata void rcar_pwrc_clusteroff(u_register_t mpidr); 48ffb725beSTakuya Sakata void rcar_pwrc_cpuoff(u_register_t mpidr); 49ffb725beSTakuya Sakata void rcar_pwrc_cpuon(u_register_t mpidr); 50ffb725beSTakuya Sakata int32_t rcar_pwrc_cpu_on_check(u_register_t mpidr); 51c40739a6SBiju Das void rcar_pwrc_setup(void); 52c40739a6SBiju Das 53ffb725beSTakuya Sakata uint32_t rcar_pwrc_get_cpu_wkr(u_register_t mpidr); 54ffb725beSTakuya Sakata uint32_t rcar_pwrc_status(u_register_t mpidr); 55c40739a6SBiju Das uint32_t rcar_pwrc_get_cluster(void); 56ffb725beSTakuya Sakata uint32_t rcar_pwrc_get_mpidr_cluster(u_register_t mpidr); 57c40739a6SBiju Das uint32_t rcar_pwrc_get_cpu_num(uint32_t cluster_type); 58c40739a6SBiju Das void plat_secondary_reset(void); 59c40739a6SBiju Das 60c40739a6SBiju Das void rcar_pwrc_code_copy_to_system_ram(void); 61c40739a6SBiju Das 62c40739a6SBiju Das #if !PMIC_ROHM_BD9571 63c40739a6SBiju Das void rcar_pwrc_system_reset(void); 64c40739a6SBiju Das #endif 65c40739a6SBiju Das 66c40739a6SBiju Das #if RCAR_SYSTEM_SUSPEND 67c40739a6SBiju Das void rcar_pwrc_go_suspend_to_ram(void); 68c40739a6SBiju Das void rcar_pwrc_set_suspend_to_ram(void); 69c40739a6SBiju Das void rcar_pwrc_init_suspend_to_ram(void); 70c40739a6SBiju Das void rcar_pwrc_suspend_to_ram(void); 71c40739a6SBiju Das #endif 72c40739a6SBiju Das 73c40739a6SBiju Das extern uint32_t rcar_pwrc_switch_stack(uintptr_t jump, uintptr_t stack, 74c40739a6SBiju Das void *arg); 75c40739a6SBiju Das #endif 76c40739a6SBiju Das 77c40739a6SBiju Das #endif /* PWRC_H */ 78