1 /* 2 * Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/debug.h> 8 9 #include "emmc_config.h" 10 #include "emmc_def.h" 11 #include "emmc_hal.h" 12 #include "emmc_registers.h" 13 #include "emmc_std.h" 14 15 static const uint32_t cmd_reg_hw[EMMC_CMD_MAX + 1] = { 16 0x00000000, /* CMD0 */ 17 0x00000701, /* CMD1 */ 18 0x00000002, /* CMD2 */ 19 0x00000003, /* CMD3 */ 20 0x00000004, /* CMD4 */ 21 0x00000505, /* CMD5 */ 22 0x00000406, /* CMD6 */ 23 0x00000007, /* CMD7 */ 24 0x00001C08, /* CMD8 */ 25 0x00000009, /* CMD9 */ 26 0x0000000A, /* CMD10 */ 27 0x00000000, /* reserved */ 28 0x0000000C, /* CMD12 */ 29 0x0000000D, /* CMD13 */ 30 0x00001C0E, /* CMD14 */ 31 0x0000000F, /* CMD15 */ 32 0x00000010, /* CMD16 */ 33 0x00000011, /* CMD17 */ 34 0x00007C12, /* CMD18 */ 35 0x00000C13, /* CMD19 */ 36 0x00000000, 37 0x00001C15, /* CMD21 */ 38 0x00000000, 39 0x00000017, /* CMD23 */ 40 0x00000018, /* CMD24 */ 41 0x00006C19, /* CMD25 */ 42 0x00000C1A, /* CMD26 */ 43 0x0000001B, /* CMD27 */ 44 0x0000001C, /* CMD28 */ 45 0x0000001D, /* CMD29 */ 46 0x0000001E, /* CMD30 */ 47 0x00001C1F, /* CMD31 */ 48 0x00000000, 49 0x00000000, 50 0x00000000, 51 0x00000423, /* CMD35 */ 52 0x00000424, /* CMD36 */ 53 0x00000000, 54 0x00000026, /* CMD38 */ 55 0x00000427, /* CMD39 */ 56 0x00000428, /* CMD40(send cmd) */ 57 0x00000000, 58 0x0000002A, /* CMD42 */ 59 0x00000000, 60 0x00000000, 61 0x00000000, 62 0x00000000, 63 0x00000000, 64 0x00000000, 65 0x00000C31, 66 0x00000000, 67 0x00000000, 68 0x00000000, 69 0x00007C35, 70 0x00006C36, 71 0x00000037, /* CMD55 */ 72 0x00000038, /* CMD56(Read) */ 73 0x00000000, 74 0x00000000, 75 0x00000000, 76 0x00000000 77 }; 78 79 uint32_t emmc_bit_field(uint8_t *data, uint32_t top, uint32_t bottom) 80 { 81 uint32_t value; 82 83 uint32_t index_top = (uint32_t) (15 - (top >> 3)); 84 uint32_t index_bottom = (uint32_t) (15 - (bottom >> 3)); 85 86 if (index_top == index_bottom) { 87 value = data[index_top]; 88 } else if ((index_top + 1) == index_bottom) { 89 value = 90 (uint32_t) ((data[index_top] << 8) | data[index_bottom]); 91 } else if ((index_top + 2) == index_bottom) { 92 value = 93 (uint32_t) ((data[index_top] << 16) | 94 (data[index_top + 1] << 8) | data[index_top + 95 2]); 96 } else { 97 value = 98 (uint32_t) ((data[index_top] << 24) | 99 (data[index_top + 1] << 16) | 100 (data[index_top + 2] << 8) | 101 data[index_top + 3]); 102 } 103 104 value = ((value >> (bottom & 0x07)) & ((1 << (top - bottom + 1)) - 1)); 105 106 return value; 107 } 108 109 void emmc_write_error_info(uint16_t func_no, EMMC_ERROR_CODE error_code) 110 { 111 112 mmc_drv_obj.error_info.num = func_no; 113 mmc_drv_obj.error_info.code = (uint16_t) error_code; 114 115 ERROR("BL2: emmc err:func_no=0x%x code=0x%x\n", func_no, error_code); 116 } 117 118 void emmc_write_error_info_func_no(uint16_t func_no) 119 { 120 121 mmc_drv_obj.error_info.num = func_no; 122 123 ERROR("BL2: emmc err:func_no=0x%x\n", func_no); 124 } 125 126 void emmc_make_nontrans_cmd(HAL_MEMCARD_COMMAND cmd, uint32_t arg) 127 { 128 /* command information */ 129 mmc_drv_obj.cmd_info.cmd = cmd; 130 mmc_drv_obj.cmd_info.arg = arg; 131 mmc_drv_obj.cmd_info.dir = HAL_MEMCARD_READ; 132 mmc_drv_obj.cmd_info.hw = 133 cmd_reg_hw[cmd & HAL_MEMCARD_COMMAND_INDEX_MASK]; 134 135 /* clear data transfer information */ 136 mmc_drv_obj.trans_size = 0; 137 mmc_drv_obj.remain_size = 0; 138 mmc_drv_obj.buff_address_virtual = NULL; 139 mmc_drv_obj.buff_address_physical = NULL; 140 141 /* response information */ 142 mmc_drv_obj.response_length = 6; 143 144 switch (mmc_drv_obj.cmd_info.cmd & HAL_MEMCARD_RESPONSE_TYPE_MASK) { 145 case HAL_MEMCARD_RESPONSE_NONE: 146 mmc_drv_obj.response = (uint32_t *) mmc_drv_obj.response_data; 147 mmc_drv_obj.response_length = 0; 148 break; 149 case HAL_MEMCARD_RESPONSE_R1: 150 mmc_drv_obj.response = &mmc_drv_obj.r1_card_status; 151 break; 152 case HAL_MEMCARD_RESPONSE_R1b: 153 mmc_drv_obj.cmd_info.hw |= BIT10; /* bit10 = R1 busy bit */ 154 mmc_drv_obj.response = &mmc_drv_obj.r1_card_status; 155 break; 156 case HAL_MEMCARD_RESPONSE_R2: 157 mmc_drv_obj.response = (uint32_t *) mmc_drv_obj.response_data; 158 mmc_drv_obj.response_length = 17; 159 break; 160 case HAL_MEMCARD_RESPONSE_R3: 161 mmc_drv_obj.response = &mmc_drv_obj.r3_ocr; 162 break; 163 case HAL_MEMCARD_RESPONSE_R4: 164 mmc_drv_obj.response = &mmc_drv_obj.r4_resp; 165 break; 166 case HAL_MEMCARD_RESPONSE_R5: 167 mmc_drv_obj.response = &mmc_drv_obj.r5_resp; 168 break; 169 default: 170 mmc_drv_obj.response = (uint32_t *) mmc_drv_obj.response_data; 171 break; 172 } 173 } 174 175 void emmc_make_trans_cmd(HAL_MEMCARD_COMMAND cmd, uint32_t arg, 176 uint32_t *buff_address_virtual, 177 uint32_t len, 178 HAL_MEMCARD_OPERATION dir, 179 HAL_MEMCARD_DATA_TRANSFER_MODE transfer_mode) 180 { 181 emmc_make_nontrans_cmd(cmd, arg); /* update common information */ 182 183 /* for data transfer command */ 184 mmc_drv_obj.cmd_info.dir = dir; 185 mmc_drv_obj.buff_address_virtual = buff_address_virtual; 186 mmc_drv_obj.buff_address_physical = buff_address_virtual; 187 mmc_drv_obj.trans_size = len; 188 mmc_drv_obj.remain_size = len; 189 mmc_drv_obj.transfer_mode = transfer_mode; 190 } 191 192 EMMC_ERROR_CODE emmc_send_idle_cmd(uint32_t arg) 193 { 194 EMMC_ERROR_CODE result; 195 uint32_t freq; 196 197 /* initialize state */ 198 mmc_drv_obj.mount = FALSE; 199 mmc_drv_obj.selected = FALSE; 200 mmc_drv_obj.during_transfer = FALSE; 201 mmc_drv_obj.during_cmd_processing = FALSE; 202 mmc_drv_obj.during_dma_transfer = FALSE; 203 mmc_drv_obj.dma_error_flag = FALSE; 204 mmc_drv_obj.force_terminate = FALSE; 205 mmc_drv_obj.state_machine_blocking = FALSE; 206 207 mmc_drv_obj.bus_width = HAL_MEMCARD_DATA_WIDTH_1_BIT; 208 mmc_drv_obj.max_freq = MMC_20MHZ; /* 20MHz */ 209 mmc_drv_obj.current_state = EMMC_R1_STATE_IDLE; 210 211 /* CMD0 (MMC clock is current frequency. if Data transfer mode, 20MHz or higher.) */ 212 emmc_make_nontrans_cmd(CMD0_GO_IDLE_STATE, arg); /* CMD0 */ 213 result = emmc_exec_cmd(EMMC_R1_ERROR_MASK, mmc_drv_obj.response); 214 if (result != EMMC_SUCCESS) { 215 return result; 216 } 217 218 /* change MMC clock(400KHz) */ 219 freq = MMC_400KHZ; 220 result = emmc_set_request_mmc_clock(&freq); 221 if (result != EMMC_SUCCESS) { 222 return result; 223 } 224 225 return EMMC_SUCCESS; 226 } 227