1 /* 2 * Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <stddef.h> 8 9 #include <lib/mmio.h> 10 11 #include "emmc_config.h" 12 #include "emmc_hal.h" 13 #include "emmc_std.h" 14 #include "emmc_registers.h" 15 #include "emmc_def.h" 16 #include "rcar_private.h" 17 #include "cpg_registers.h" 18 19 st_mmc_base mmc_drv_obj; 20 21 EMMC_ERROR_CODE rcar_emmc_memcard_power(uint8_t mode) 22 { 23 24 if (mode == TRUE) { 25 /* power on (Vcc&Vccq is always power on) */ 26 mmc_drv_obj.card_power_enable = TRUE; 27 } else { 28 /* power off (Vcc&Vccq is always power on) */ 29 mmc_drv_obj.card_power_enable = FALSE; 30 mmc_drv_obj.mount = FALSE; 31 mmc_drv_obj.selected = FALSE; 32 } 33 34 return EMMC_SUCCESS; 35 } 36 static inline void emmc_set_retry_count(uint32_t retry) 37 { 38 mmc_drv_obj.retries_after_fail = retry; 39 } 40 41 static inline void emmc_set_data_timeout(uint32_t data_timeout) 42 { 43 mmc_drv_obj.data_timeout = data_timeout; 44 } 45 46 static void emmc_memset(uint8_t *buff, uint8_t data, uint32_t cnt) 47 { 48 if (buff == NULL) { 49 return; 50 } 51 52 while (cnt > 0) { 53 *buff++ = data; 54 cnt--; 55 } 56 } 57 58 static void emmc_driver_config(void) 59 { 60 emmc_set_retry_count(EMMC_RETRY_COUNT); 61 emmc_set_data_timeout(EMMC_RW_DATA_TIMEOUT); 62 } 63 64 static void emmc_drv_init(void) 65 { 66 emmc_memset((uint8_t *) (&mmc_drv_obj), 0, sizeof(st_mmc_base)); 67 mmc_drv_obj.card_present = HAL_MEMCARD_CARD_IS_IN; 68 mmc_drv_obj.data_timeout = EMMC_RW_DATA_TIMEOUT; 69 mmc_drv_obj.bus_width = HAL_MEMCARD_DATA_WIDTH_1_BIT; 70 } 71 72 static EMMC_ERROR_CODE emmc_dev_finalize(void) 73 { 74 EMMC_ERROR_CODE result; 75 uint32_t dataL; 76 77 /* 78 * MMC power off 79 * the power supply of eMMC device is always turning on. 80 * RST_n : Hi --> Low level. 81 */ 82 result = rcar_emmc_memcard_power(FALSE); 83 84 /* host controller reset */ 85 SETR_32(SD_INFO1, 0x00000000U); /* all interrupt clear */ 86 SETR_32(SD_INFO2, SD_INFO2_CLEAR); /* all interrupt clear */ 87 SETR_32(SD_INFO1_MASK, 0x00000000U); /* all interrupt disable */ 88 SETR_32(SD_INFO2_MASK, SD_INFO2_CLEAR); /* all interrupt disable */ 89 SETR_32(SD_CLK_CTRL, 0x00000000U); /* MMC clock stop */ 90 91 dataL = mmio_read_32(SMSTPCR3); 92 if ((dataL & CPG_MSTP_MMC) == 0U) { 93 dataL |= (CPG_MSTP_MMC); 94 mmio_write_32(CPG_CPGWPR, (~dataL)); 95 mmio_write_32(SMSTPCR3, dataL); 96 } 97 98 return result; 99 } 100 101 static EMMC_ERROR_CODE emmc_dev_init(void) 102 { 103 /* Enable clock supply to eMMC. */ 104 mstpcr_write(SMSTPCR3, CPG_MSTPSR3, CPG_MSTP_MMC); 105 106 /* Set SD clock */ 107 mmio_write_32(CPG_CPGWPR, ~((uint32_t) (BIT9 | BIT0))); /* SD phy 200MHz */ 108 109 /* Stop SDnH clock & SDn=200MHz */ 110 mmio_write_32(CPG_SDxCKCR, (BIT9 | BIT0)); 111 112 /* MMCIF initialize */ 113 SETR_32(SD_INFO1, 0x00000000U); /* all interrupt clear */ 114 SETR_32(SD_INFO2, SD_INFO2_CLEAR); /* all interrupt clear */ 115 SETR_32(SD_INFO1_MASK, 0x00000000U); /* all interrupt disable */ 116 SETR_32(SD_INFO2_MASK, SD_INFO2_CLEAR); /* all interrupt disable */ 117 118 SETR_32(HOST_MODE, 0x00000000U); /* SD_BUF access width = 64-bit */ 119 SETR_32(SD_OPTION, 0x0000C0EEU); /* Bus width = 1bit, timeout=MAX */ 120 SETR_32(SD_CLK_CTRL, 0x00000000U); /* Disable Automatic Control & Clock Output */ 121 122 return EMMC_SUCCESS; 123 } 124 125 static EMMC_ERROR_CODE emmc_reset_controller(void) 126 { 127 EMMC_ERROR_CODE result; 128 129 /* initialize mmc driver */ 130 emmc_drv_init(); 131 132 /* initialize H/W */ 133 result = emmc_dev_init(); 134 if (result == EMMC_SUCCESS) { 135 mmc_drv_obj.initialize = TRUE; 136 } 137 138 return result; 139 140 } 141 142 EMMC_ERROR_CODE emmc_terminate(void) 143 { 144 EMMC_ERROR_CODE result; 145 146 result = emmc_dev_finalize(); 147 148 emmc_memset((uint8_t *) (&mmc_drv_obj), 0, sizeof(st_mmc_base)); 149 150 return result; 151 } 152 153 EMMC_ERROR_CODE rcar_emmc_init(void) 154 { 155 EMMC_ERROR_CODE result; 156 157 result = emmc_reset_controller(); 158 if (result == EMMC_SUCCESS) { 159 emmc_driver_config(); 160 } 161 162 return result; 163 } 164