1*c20e123cSPankaj Gupta /* 2*c20e123cSPankaj Gupta * Copyright 2021 NXP 3*c20e123cSPankaj Gupta * 4*c20e123cSPankaj Gupta * SPDX-License-Identifier: BSD-3-Clause 5*c20e123cSPankaj Gupta * 6*c20e123cSPankaj Gupta */ 7*c20e123cSPankaj Gupta 8*c20e123cSPankaj Gupta #include <assert.h> 9*c20e123cSPankaj Gupta 10*c20e123cSPankaj Gupta #include <common/debug.h> 11*c20e123cSPankaj Gupta #include <lib/mmio.h> 12*c20e123cSPankaj Gupta #include <lib/xlat_tables/xlat_tables_v2.h> 13*c20e123cSPankaj Gupta #include <qspi.h> 14*c20e123cSPankaj Gupta qspi_io_setup(uintptr_t nxp_qspi_flash_addr,size_t nxp_qspi_flash_size,uintptr_t fip_offset)15*c20e123cSPankaj Guptaint qspi_io_setup(uintptr_t nxp_qspi_flash_addr, 16*c20e123cSPankaj Gupta size_t nxp_qspi_flash_size, 17*c20e123cSPankaj Gupta uintptr_t fip_offset) 18*c20e123cSPankaj Gupta { 19*c20e123cSPankaj Gupta uint32_t qspi_mcr_val = qspi_in32(CHS_QSPI_MCR); 20*c20e123cSPankaj Gupta 21*c20e123cSPankaj Gupta /* Enable and change endianness of QSPI IP */ 22*c20e123cSPankaj Gupta qspi_out32(CHS_QSPI_MCR, (qspi_mcr_val | CHS_QSPI_64LE)); 23*c20e123cSPankaj Gupta 24*c20e123cSPankaj Gupta /* Adding QSPI Memory Map in XLAT Table */ 25*c20e123cSPankaj Gupta mmap_add_region(nxp_qspi_flash_addr, nxp_qspi_flash_addr, 26*c20e123cSPankaj Gupta nxp_qspi_flash_size, MT_MEMORY | MT_RW); 27*c20e123cSPankaj Gupta 28*c20e123cSPankaj Gupta return 0; 29*c20e123cSPankaj Gupta } 30