1*76f735fdSPankaj Gupta /* 2*76f735fdSPankaj Gupta * Copyright 2020 NXP 3*76f735fdSPankaj Gupta * 4*76f735fdSPankaj Gupta * SPDX-License-Identifier: BSD-3-Clause 5*76f735fdSPankaj Gupta * 6*76f735fdSPankaj Gupta */ 7*76f735fdSPankaj Gupta 8*76f735fdSPankaj Gupta #include <arch.h> 9*76f735fdSPankaj Gupta #include <cci.h> 10*76f735fdSPankaj Gupta 11*76f735fdSPankaj Gupta #include <plat_arm.h> 12*76f735fdSPankaj Gupta 13*76f735fdSPankaj Gupta /****************************************************************************** 14*76f735fdSPankaj Gupta * The following functions are defined as weak to allow a platform to override 15*76f735fdSPankaj Gupta * the way ARM CCI driver is initialised and used. 16*76f735fdSPankaj Gupta *****************************************************************************/ 17*76f735fdSPankaj Gupta #pragma weak plat_arm_interconnect_enter_coherency 18*76f735fdSPankaj Gupta #pragma weak plat_arm_interconnect_exit_coherency 19*76f735fdSPankaj Gupta 20*76f735fdSPankaj Gupta /****************************************************************************** 21*76f735fdSPankaj Gupta * Helper function to place current master into coherency 22*76f735fdSPankaj Gupta *****************************************************************************/ 23*76f735fdSPankaj Gupta void plat_ls_interconnect_enter_coherency(unsigned int num_clusters) 24*76f735fdSPankaj Gupta { 25*76f735fdSPankaj Gupta cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 26*76f735fdSPankaj Gupta 27*76f735fdSPankaj Gupta for (uint32_t index = 1U; index < num_clusters; index++) { 28*76f735fdSPankaj Gupta cci_enable_snoop_dvm_reqs(index); 29*76f735fdSPankaj Gupta } 30*76f735fdSPankaj Gupta } 31*76f735fdSPankaj Gupta 32*76f735fdSPankaj Gupta /****************************************************************************** 33*76f735fdSPankaj Gupta * Helper function to remove current master from coherency 34*76f735fdSPankaj Gupta *****************************************************************************/ 35*76f735fdSPankaj Gupta void plat_ls_interconnect_exit_coherency(void) 36*76f735fdSPankaj Gupta { 37*76f735fdSPankaj Gupta cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1())); 38*76f735fdSPankaj Gupta } 39