1*b53334daSPankaj Gupta /* 2*b53334daSPankaj Gupta * Copyright 2021 NXP 3*b53334daSPankaj Gupta * 4*b53334daSPankaj Gupta * SPDX-License-Identifier: BSD-3-Clause 5*b53334daSPankaj Gupta * 6*b53334daSPankaj Gupta */ 7*b53334daSPankaj Gupta 8*b53334daSPankaj Gupta #include <gicv2.h> 9*b53334daSPankaj Gupta #include <plat_gic.h> 10*b53334daSPankaj Gupta 11*b53334daSPankaj Gupta 12*b53334daSPankaj Gupta /* 13*b53334daSPankaj Gupta * NXP common helper to initialize the GICv3 only driver. 14*b53334daSPankaj Gupta */ 15*b53334daSPankaj Gupta void plat_ls_gic_driver_init(uintptr_t nxp_gicd_addr, 16*b53334daSPankaj Gupta uintptr_t nxp_gicc_addr, 17*b53334daSPankaj Gupta uint8_t plat_core_count, 18*b53334daSPankaj Gupta interrupt_prop_t *ls_interrupt_props, 19*b53334daSPankaj Gupta uint8_t ls_interrupt_prop_count, 20*b53334daSPankaj Gupta uint32_t *target_mask_array) 21*b53334daSPankaj Gupta { 22*b53334daSPankaj Gupta static struct gicv2_driver_data ls_gic_data; 23*b53334daSPankaj Gupta 24*b53334daSPankaj Gupta ls_gic_data.gicd_base = nxp_gicd_addr; 25*b53334daSPankaj Gupta ls_gic_data.gicc_base = nxp_gicc_addr; 26*b53334daSPankaj Gupta ls_gic_data.target_masks = target_mask_array; 27*b53334daSPankaj Gupta ls_gic_data.target_masks_num = plat_core_count; 28*b53334daSPankaj Gupta ls_gic_data.interrupt_props = ls_interrupt_props; 29*b53334daSPankaj Gupta ls_gic_data.interrupt_props_num = ls_interrupt_prop_count; 30*b53334daSPankaj Gupta 31*b53334daSPankaj Gupta gicv2_driver_init(&ls_gic_data); 32*b53334daSPankaj Gupta } 33*b53334daSPankaj Gupta 34*b53334daSPankaj Gupta void plat_ls_gic_init(void) 35*b53334daSPankaj Gupta { 36*b53334daSPankaj Gupta gicv2_distif_init(); 37*b53334daSPankaj Gupta gicv2_pcpu_distif_init(); 38*b53334daSPankaj Gupta gicv2_cpuif_enable(); 39*b53334daSPankaj Gupta } 40*b53334daSPankaj Gupta 41*b53334daSPankaj Gupta /****************************************************************************** 42*b53334daSPankaj Gupta * ARM common helper to enable the GICv2 CPU interface 43*b53334daSPankaj Gupta *****************************************************************************/ 44*b53334daSPankaj Gupta void plat_ls_gic_cpuif_enable(void) 45*b53334daSPankaj Gupta { 46*b53334daSPankaj Gupta gicv2_cpuif_enable(); 47*b53334daSPankaj Gupta } 48*b53334daSPankaj Gupta 49*b53334daSPankaj Gupta /****************************************************************************** 50*b53334daSPankaj Gupta * ARM common helper to disable the GICv2 CPU interface 51*b53334daSPankaj Gupta *****************************************************************************/ 52*b53334daSPankaj Gupta void plat_ls_gic_cpuif_disable(void) 53*b53334daSPankaj Gupta { 54*b53334daSPankaj Gupta gicv2_cpuif_disable(); 55*b53334daSPankaj Gupta } 56*b53334daSPankaj Gupta 57*b53334daSPankaj Gupta /****************************************************************************** 58*b53334daSPankaj Gupta * NXP common helper to initialize GICv2 per cpu 59*b53334daSPankaj Gupta *****************************************************************************/ 60*b53334daSPankaj Gupta void plat_gic_pcpu_init(void) 61*b53334daSPankaj Gupta { 62*b53334daSPankaj Gupta gicv2_pcpu_distif_init(); 63*b53334daSPankaj Gupta gicv2_cpuif_enable(); 64*b53334daSPankaj Gupta } 65*b53334daSPankaj Gupta 66*b53334daSPankaj Gupta /****************************************************************************** 67*b53334daSPankaj Gupta * Stubs for Redistributor power management. Although GICv2 doesn't have 68*b53334daSPankaj Gupta * Redistributor interface, these are provided for the sake of uniform GIC API 69*b53334daSPankaj Gupta *****************************************************************************/ 70*b53334daSPankaj Gupta void plat_ls_gic_redistif_on(void) 71*b53334daSPankaj Gupta { 72*b53334daSPankaj Gupta } 73*b53334daSPankaj Gupta 74*b53334daSPankaj Gupta void plat_ls_gic_redistif_off(void) 75*b53334daSPankaj Gupta { 76*b53334daSPankaj Gupta } 77