1*b35ce0c4SPankaj Gupta /* 2*b35ce0c4SPankaj Gupta * Copyright 2021 NXP 3*b35ce0c4SPankaj Gupta * 4*b35ce0c4SPankaj Gupta * SPDX-License-Identifier: BSD-3-Clause 5*b35ce0c4SPankaj Gupta * 6*b35ce0c4SPankaj Gupta */ 7*b35ce0c4SPankaj Gupta 8*b35ce0c4SPankaj Gupta #include <errno.h> 9*b35ce0c4SPankaj Gupta #include <stdbool.h> 10*b35ce0c4SPankaj Gupta #include <stdint.h> 11*b35ce0c4SPankaj Gupta #include <stdio.h> 12*b35ce0c4SPankaj Gupta #include <stdlib.h> 13*b35ce0c4SPankaj Gupta 14*b35ce0c4SPankaj Gupta #include <common/debug.h> 15*b35ce0c4SPankaj Gupta #include <ddr.h> 16*b35ce0c4SPankaj Gupta 17*b35ce0c4SPankaj Gupta static void cal_ddr_sdram_clk_cntl(struct ddr_cfg_regs *regs, 18*b35ce0c4SPankaj Gupta const struct memctl_opt *popts) 19*b35ce0c4SPankaj Gupta { 20*b35ce0c4SPankaj Gupta const unsigned int clk_adj = popts->clk_adj; 21*b35ce0c4SPankaj Gupta const unsigned int ss_en = 0U; 22*b35ce0c4SPankaj Gupta 23*b35ce0c4SPankaj Gupta regs->clk_cntl = ((ss_en & U(0x1)) << 31U) | 24*b35ce0c4SPankaj Gupta ((clk_adj & U(0x1F)) << 22U); 25*b35ce0c4SPankaj Gupta debug("clk_cntl = 0x%x\n", regs->clk_cntl); 26*b35ce0c4SPankaj Gupta } 27*b35ce0c4SPankaj Gupta 28*b35ce0c4SPankaj Gupta static void cal_ddr_cdr(struct ddr_cfg_regs *regs, 29*b35ce0c4SPankaj Gupta const struct memctl_opt *popts) 30*b35ce0c4SPankaj Gupta { 31*b35ce0c4SPankaj Gupta regs->cdr[0] = popts->ddr_cdr1; 32*b35ce0c4SPankaj Gupta regs->cdr[1] = popts->ddr_cdr2; 33*b35ce0c4SPankaj Gupta debug("cdr[0] = 0x%x\n", regs->cdr[0]); 34*b35ce0c4SPankaj Gupta debug("cdr[1] = 0x%x\n", regs->cdr[1]); 35*b35ce0c4SPankaj Gupta } 36*b35ce0c4SPankaj Gupta 37*b35ce0c4SPankaj Gupta static void cal_ddr_wrlvl_cntl(struct ddr_cfg_regs *regs, 38*b35ce0c4SPankaj Gupta const struct memctl_opt *popts) 39*b35ce0c4SPankaj Gupta { 40*b35ce0c4SPankaj Gupta const unsigned int wrlvl_en = 1U; /* enabled */ 41*b35ce0c4SPankaj Gupta const unsigned int wrlvl_mrd = U(0x6); /* > 40nCK */ 42*b35ce0c4SPankaj Gupta const unsigned int wrlvl_odten = U(0x7); /* 128 */ 43*b35ce0c4SPankaj Gupta const unsigned int wrlvl_dqsen = U(0x5); /* > 25nCK */ 44*b35ce0c4SPankaj Gupta const unsigned int wrlvl_wlr = U(0x6); /* > tWLO + 6 */ 45*b35ce0c4SPankaj Gupta const unsigned int wrlvl_smpl = popts->wrlvl_override ? 46*b35ce0c4SPankaj Gupta popts->wrlvl_sample : U(0xf); 47*b35ce0c4SPankaj Gupta const unsigned int wrlvl_start = popts->wrlvl_start; 48*b35ce0c4SPankaj Gupta 49*b35ce0c4SPankaj Gupta regs->wrlvl_cntl[0] = ((wrlvl_en & U(0x1)) << 31U) | 50*b35ce0c4SPankaj Gupta ((wrlvl_mrd & U(0x7)) << 24U) | 51*b35ce0c4SPankaj Gupta ((wrlvl_odten & U(0x7)) << 20U) | 52*b35ce0c4SPankaj Gupta ((wrlvl_dqsen & U(0x7)) << 16U) | 53*b35ce0c4SPankaj Gupta ((wrlvl_smpl & U(0xf)) << 12U) | 54*b35ce0c4SPankaj Gupta ((wrlvl_wlr & U(0x7)) << 8U) | 55*b35ce0c4SPankaj Gupta ((wrlvl_start & U(0x1F)) << 0U); 56*b35ce0c4SPankaj Gupta regs->wrlvl_cntl[1] = popts->wrlvl_ctl_2; 57*b35ce0c4SPankaj Gupta regs->wrlvl_cntl[2] = popts->wrlvl_ctl_3; 58*b35ce0c4SPankaj Gupta debug("wrlvl_cntl[0] = 0x%x\n", regs->wrlvl_cntl[0]); 59*b35ce0c4SPankaj Gupta debug("wrlvl_cntl[1] = 0x%x\n", regs->wrlvl_cntl[1]); 60*b35ce0c4SPankaj Gupta debug("wrlvl_cntl[2] = 0x%x\n", regs->wrlvl_cntl[2]); 61*b35ce0c4SPankaj Gupta 62*b35ce0c4SPankaj Gupta } 63*b35ce0c4SPankaj Gupta 64*b35ce0c4SPankaj Gupta static void cal_ddr_dbg(struct ddr_cfg_regs *regs, 65*b35ce0c4SPankaj Gupta const struct memctl_opt *popts) 66*b35ce0c4SPankaj Gupta { 67*b35ce0c4SPankaj Gupta if (popts->cswl_override != 0) { 68*b35ce0c4SPankaj Gupta regs->debug[18] = popts->cswl_override; 69*b35ce0c4SPankaj Gupta } 70*b35ce0c4SPankaj Gupta 71*b35ce0c4SPankaj Gupta #ifdef CONFIG_SYS_FSL_DDR_EMU 72*b35ce0c4SPankaj Gupta /* disable DDR training for emulator */ 73*b35ce0c4SPankaj Gupta regs->debug[2] = U(0x00000400); 74*b35ce0c4SPankaj Gupta regs->debug[4] = U(0xff800800); 75*b35ce0c4SPankaj Gupta regs->debug[5] = U(0x08000800); 76*b35ce0c4SPankaj Gupta regs->debug[6] = U(0x08000800); 77*b35ce0c4SPankaj Gupta regs->debug[7] = U(0x08000800); 78*b35ce0c4SPankaj Gupta regs->debug[8] = U(0x08000800); 79*b35ce0c4SPankaj Gupta #endif 80*b35ce0c4SPankaj Gupta if (popts->cpo_sample != 0U) { 81*b35ce0c4SPankaj Gupta regs->debug[28] = popts->cpo_sample; 82*b35ce0c4SPankaj Gupta debug("debug[28] = 0x%x\n", regs->debug[28]); 83*b35ce0c4SPankaj Gupta } 84*b35ce0c4SPankaj Gupta } 85*b35ce0c4SPankaj Gupta 86*b35ce0c4SPankaj Gupta int compute_ddr_phy(struct ddr_info *priv) 87*b35ce0c4SPankaj Gupta { 88*b35ce0c4SPankaj Gupta const struct memctl_opt *popts = &priv->opt; 89*b35ce0c4SPankaj Gupta struct ddr_cfg_regs *regs = &priv->ddr_reg; 90*b35ce0c4SPankaj Gupta 91*b35ce0c4SPankaj Gupta cal_ddr_sdram_clk_cntl(regs, popts); 92*b35ce0c4SPankaj Gupta cal_ddr_cdr(regs, popts); 93*b35ce0c4SPankaj Gupta cal_ddr_wrlvl_cntl(regs, popts); 94*b35ce0c4SPankaj Gupta cal_ddr_dbg(regs, popts); 95*b35ce0c4SPankaj Gupta 96*b35ce0c4SPankaj Gupta return 0; 97*b35ce0c4SPankaj Gupta } 98