xref: /rk3399_ARM-atf/drivers/nxp/ddr/nxp-ddr/ddr.mk (revision b35ce0c413a71689a2b46453b9c30596128f13dc)
1*b35ce0c4SPankaj Gupta#
2*b35ce0c4SPankaj Gupta# Copyright 2021 NXP
3*b35ce0c4SPankaj Gupta#
4*b35ce0c4SPankaj Gupta# SPDX-License-Identifier: BSD-3-Clause
5*b35ce0c4SPankaj Gupta#
6*b35ce0c4SPankaj Gupta
7*b35ce0c4SPankaj GuptaDDR_DRIVERS_PATH	:= ${PLAT_DRIVERS_PATH}/ddr
8*b35ce0c4SPankaj Gupta
9*b35ce0c4SPankaj Guptaifeq ($(PLAT_DDR_PHY), PHY_GEN2)
10*b35ce0c4SPankaj Gupta$(eval $(call add_define, PHY_GEN2))
11*b35ce0c4SPankaj GuptaPLAT_DDR_PHY_DIR		:= phy-gen2
12*b35ce0c4SPankaj Guptaifeq (${APPLY_MAX_CDD},yes)
13*b35ce0c4SPankaj Gupta$(eval $(call add_define,NXP_APPLY_MAX_CDD))
14*b35ce0c4SPankaj Guptaendif
15*b35ce0c4SPankaj Gupta
16*b35ce0c4SPankaj Guptaifeq (${ERRATA_DDR_A011396}, 1)
17*b35ce0c4SPankaj Gupta$(eval $(call add_define,ERRATA_DDR_A011396))
18*b35ce0c4SPankaj Guptaendif
19*b35ce0c4SPankaj Gupta
20*b35ce0c4SPankaj Guptaifeq (${ERRATA_DDR_A050450}, 1)
21*b35ce0c4SPankaj Gupta$(eval $(call add_define,ERRATA_DDR_A050450))
22*b35ce0c4SPankaj Guptaendif
23*b35ce0c4SPankaj Gupta
24*b35ce0c4SPankaj Guptaendif
25*b35ce0c4SPankaj Gupta
26*b35ce0c4SPankaj Guptaifeq ($(PLAT_DDR_PHY), PHY_GEN1)
27*b35ce0c4SPankaj GuptaPLAT_DDR_PHY_DIR		:= phy-gen1
28*b35ce0c4SPankaj Gupta
29*b35ce0c4SPankaj Guptaifeq (${ERRATA_DDR_A008511},1)
30*b35ce0c4SPankaj Gupta$(eval $(call add_define,ERRATA_DDR_A008511))
31*b35ce0c4SPankaj Guptaendif
32*b35ce0c4SPankaj Gupta
33*b35ce0c4SPankaj Guptaifeq (${ERRATA_DDR_A009803},1)
34*b35ce0c4SPankaj Gupta$(eval $(call add_define,ERRATA_DDR_A009803))
35*b35ce0c4SPankaj Guptaendif
36*b35ce0c4SPankaj Gupta
37*b35ce0c4SPankaj Guptaifeq (${ERRATA_DDR_A009942},1)
38*b35ce0c4SPankaj Gupta$(eval $(call add_define,ERRATA_DDR_A009942))
39*b35ce0c4SPankaj Guptaendif
40*b35ce0c4SPankaj Gupta
41*b35ce0c4SPankaj Guptaifeq (${ERRATA_DDR_A010165},1)
42*b35ce0c4SPankaj Gupta$(eval $(call add_define,ERRATA_DDR_A010165))
43*b35ce0c4SPankaj Guptaendif
44*b35ce0c4SPankaj Gupta
45*b35ce0c4SPankaj Guptaendif
46*b35ce0c4SPankaj Gupta
47*b35ce0c4SPankaj Guptaifeq ($(DDR_BIST), yes)
48*b35ce0c4SPankaj Gupta$(eval $(call add_define, BIST_EN))
49*b35ce0c4SPankaj Guptaendif
50*b35ce0c4SPankaj Gupta
51*b35ce0c4SPankaj Guptaifeq ($(DDR_DEBUG), yes)
52*b35ce0c4SPankaj Gupta$(eval $(call add_define, DDR_DEBUG))
53*b35ce0c4SPankaj Guptaendif
54*b35ce0c4SPankaj Gupta
55*b35ce0c4SPankaj Guptaifeq ($(DDR_PHY_DEBUG), yes)
56*b35ce0c4SPankaj Gupta$(eval $(call add_define, DDR_PHY_DEBUG))
57*b35ce0c4SPankaj Guptaendif
58*b35ce0c4SPankaj Gupta
59*b35ce0c4SPankaj Guptaifeq ($(DEBUG_PHY_IO), yes)
60*b35ce0c4SPankaj Gupta$(eval $(call add_define, DEBUG_PHY_IO))
61*b35ce0c4SPankaj Guptaendif
62*b35ce0c4SPankaj Gupta
63*b35ce0c4SPankaj Guptaifeq ($(DEBUG_WARM_RESET), yes)
64*b35ce0c4SPankaj Gupta$(eval $(call add_define, DEBUG_WARM_RESET))
65*b35ce0c4SPankaj Guptaendif
66*b35ce0c4SPankaj Gupta
67*b35ce0c4SPankaj Guptaifeq ($(DEBUG_DDR_INPUT_CONFIG), yes)
68*b35ce0c4SPankaj Gupta$(eval $(call add_define, DEBUG_DDR_INPUT_CONFIG))
69*b35ce0c4SPankaj Guptaendif
70*b35ce0c4SPankaj Gupta
71*b35ce0c4SPankaj GuptaDDR_CNTLR_SOURCES	:= $(DDR_DRIVERS_PATH)/nxp-ddr/ddr.c \
72*b35ce0c4SPankaj Gupta			   $(DDR_DRIVERS_PATH)/nxp-ddr/ddrc.c \
73*b35ce0c4SPankaj Gupta			   $(DDR_DRIVERS_PATH)/nxp-ddr/dimm.c \
74*b35ce0c4SPankaj Gupta			   $(DDR_DRIVERS_PATH)/nxp-ddr/regs.c \
75*b35ce0c4SPankaj Gupta			   $(DDR_DRIVERS_PATH)/nxp-ddr/utility.c \
76*b35ce0c4SPankaj Gupta			   $(DDR_DRIVERS_PATH)/$(PLAT_DDR_PHY_DIR)/phy.c
77*b35ce0c4SPankaj Gupta
78*b35ce0c4SPankaj GuptaPLAT_INCLUDES		+= -I$(DDR_DRIVERS_PATH)/nxp-ddr \
79*b35ce0c4SPankaj Gupta			   -I$(DDR_DRIVERS_PATH)/include
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