xref: /rk3399_ARM-atf/drivers/nxp/clk/s32cc/s32cc_early_clks.c (revision 66af5425a6c28af7f426a82af4ec7ea4049aa6f2)
1*66af5425SGhennadi Procopciuc /*
2*66af5425SGhennadi Procopciuc  * Copyright 2024 NXP
3*66af5425SGhennadi Procopciuc  *
4*66af5425SGhennadi Procopciuc  * SPDX-License-Identifier: BSD-3-Clause
5*66af5425SGhennadi Procopciuc  */
6*66af5425SGhennadi Procopciuc #include <drivers/clk.h>
7*66af5425SGhennadi Procopciuc #include <s32cc-clk-drv.h>
8*66af5425SGhennadi Procopciuc #include <s32cc-clk-ids.h>
9*66af5425SGhennadi Procopciuc #include <s32cc-clk-utils.h>
10*66af5425SGhennadi Procopciuc 
11*66af5425SGhennadi Procopciuc #define S32CC_FXOSC_FREQ	(40U * MHZ)
12*66af5425SGhennadi Procopciuc 
13*66af5425SGhennadi Procopciuc int s32cc_init_early_clks(void)
14*66af5425SGhennadi Procopciuc {
15*66af5425SGhennadi Procopciuc 	int ret;
16*66af5425SGhennadi Procopciuc 
17*66af5425SGhennadi Procopciuc 	s32cc_clk_register_drv();
18*66af5425SGhennadi Procopciuc 
19*66af5425SGhennadi Procopciuc 	ret = clk_set_rate(S32CC_CLK_FXOSC, S32CC_FXOSC_FREQ, NULL);
20*66af5425SGhennadi Procopciuc 	if (ret != 0) {
21*66af5425SGhennadi Procopciuc 		return ret;
22*66af5425SGhennadi Procopciuc 	}
23*66af5425SGhennadi Procopciuc 
24*66af5425SGhennadi Procopciuc 	return ret;
25*66af5425SGhennadi Procopciuc }
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