xref: /rk3399_ARM-atf/drivers/mentor/i2c/mi2cv.c (revision 1dcc28cfbac5dae3992ad9581f9ea68f6cb339c1)
1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  * Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.io>
4  *
5  * SPDX-License-Identifier:     BSD-3-Clause
6  * https://spdx.org/licenses
7  */
8 
9 /*
10  * This driver is for Mentor Graphics Inventra MI2CV IP core, which is used
11  * for Marvell and Allwinner SoCs in ATF.
12  */
13 
14 #include <debug.h>
15 #include <delay_timer.h>
16 #include <errno.h>
17 #include <mentor/mi2cv.h>
18 #include <mentor_i2c_plat.h>
19 #include <mmio.h>
20 
21 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE
22 #define DEBUG_I2C
23 #endif
24 
25 #define I2C_TIMEOUT_VALUE		0x500
26 #define I2C_MAX_RETRY_CNT		1000
27 #define I2C_CMD_WRITE			0x0
28 #define I2C_CMD_READ			0x1
29 
30 #define I2C_DATA_ADDR_7BIT_OFFS		0x1
31 #define I2C_DATA_ADDR_7BIT_MASK		(0xFF << I2C_DATA_ADDR_7BIT_OFFS)
32 
33 #define I2C_CONTROL_ACK			0x00000004
34 #define I2C_CONTROL_IFLG		0x00000008
35 #define I2C_CONTROL_STOP		0x00000010
36 #define I2C_CONTROL_START		0x00000020
37 #define I2C_CONTROL_TWSIEN		0x00000040
38 #define I2C_CONTROL_INTEN		0x00000080
39 
40 #define I2C_STATUS_START			0x08
41 #define I2C_STATUS_REPEATED_START		0x10
42 #define I2C_STATUS_ADDR_W_ACK			0x18
43 #define I2C_STATUS_DATA_W_ACK			0x28
44 #define I2C_STATUS_LOST_ARB_DATA_ADDR_TRANSFER	0x38
45 #define I2C_STATUS_ADDR_R_ACK			0x40
46 #define I2C_STATUS_DATA_R_ACK			0x50
47 #define I2C_STATUS_DATA_R_NAK			0x58
48 #define I2C_STATUS_LOST_ARB_GENERAL_CALL	0x78
49 #define I2C_STATUS_IDLE				0xF8
50 
51 #define I2C_UNSTUCK_TRIGGER			0x1
52 #define I2C_UNSTUCK_ONGOING			0x2
53 #define I2C_UNSTUCK_ERROR			0x4
54 
55 static struct mentor_i2c_regs *base;
56 
57 static int mentor_i2c_lost_arbitration(uint32_t *status)
58 {
59 	*status = mmio_read_32((uintptr_t)&base->status);
60 	if ((*status == I2C_STATUS_LOST_ARB_DATA_ADDR_TRANSFER) ||
61 	    (*status == I2C_STATUS_LOST_ARB_GENERAL_CALL))
62 		return -EAGAIN;
63 
64 	return 0;
65 }
66 
67 static void mentor_i2c_interrupt_clear(void)
68 {
69 	uint32_t reg;
70 
71 	reg = mmio_read_32((uintptr_t)&base->control);
72 #ifndef I2C_INTERRUPT_CLEAR_INVERTED
73 	reg &= ~(I2C_CONTROL_IFLG);
74 #else
75 	reg |= I2C_CONTROL_IFLG;
76 #endif
77 	mmio_write_32((uintptr_t)&base->control, reg);
78 	/* Wait for 1 us for the clear to take effect */
79 	udelay(1);
80 }
81 
82 static int mentor_i2c_interrupt_get(void)
83 {
84 	uint32_t reg;
85 
86 	/* get the interrupt flag bit */
87 	reg = mmio_read_32((uintptr_t)&base->control);
88 	reg &= I2C_CONTROL_IFLG;
89 	return reg && I2C_CONTROL_IFLG;
90 }
91 
92 static int mentor_i2c_wait_interrupt(void)
93 {
94 	uint32_t timeout = 0;
95 
96 	while (!mentor_i2c_interrupt_get() && (timeout++ < I2C_TIMEOUT_VALUE))
97 		;
98 	if (timeout >= I2C_TIMEOUT_VALUE)
99 		return -ETIMEDOUT;
100 
101 	return 0;
102 }
103 
104 static int mentor_i2c_start_bit_set(void)
105 {
106 	int is_int_flag = 0;
107 	uint32_t status;
108 
109 	if (mentor_i2c_interrupt_get())
110 		is_int_flag = 1;
111 
112 	/* set start bit */
113 	mmio_write_32((uintptr_t)&base->control,
114 		      mmio_read_32((uintptr_t)&base->control) |
115 		      I2C_CONTROL_START);
116 
117 	/* in case that the int flag was set before i.e. repeated start bit */
118 	if (is_int_flag) {
119 		VERBOSE("%s: repeated start Bit\n", __func__);
120 		mentor_i2c_interrupt_clear();
121 	}
122 
123 	if (mentor_i2c_wait_interrupt()) {
124 		ERROR("Start clear bit timeout\n");
125 		return -ETIMEDOUT;
126 	}
127 
128 	/* check that start bit went down */
129 	if ((mmio_read_32((uintptr_t)&base->control) &
130 	    I2C_CONTROL_START) != 0) {
131 		ERROR("Start bit didn't went down\n");
132 		return -EPERM;
133 	}
134 
135 	/* check the status */
136 	if (mentor_i2c_lost_arbitration(&status)) {
137 		ERROR("%s - %d: Lost arbitration, got status %x\n",
138 		      __func__, __LINE__, status);
139 		return -EAGAIN;
140 	}
141 	if ((status != I2C_STATUS_START) &&
142 	    (status != I2C_STATUS_REPEATED_START)) {
143 		ERROR("Got status %x after enable start bit.\n", status);
144 		return -EPERM;
145 	}
146 
147 	return 0;
148 }
149 
150 static int mentor_i2c_stop_bit_set(void)
151 {
152 	int timeout;
153 	uint32_t status;
154 
155 	/* Generate stop bit */
156 	mmio_write_32((uintptr_t)&base->control,
157 		      mmio_read_32((uintptr_t)&base->control) |
158 		      I2C_CONTROL_STOP);
159 	mentor_i2c_interrupt_clear();
160 
161 	timeout = 0;
162 	/* Read control register, check the control stop bit */
163 	while ((mmio_read_32((uintptr_t)&base->control) & I2C_CONTROL_STOP) &&
164 	       (timeout++ < I2C_TIMEOUT_VALUE))
165 		;
166 	if (timeout >= I2C_TIMEOUT_VALUE) {
167 		ERROR("Stop bit didn't went down\n");
168 		return -ETIMEDOUT;
169 	}
170 
171 	/* check that stop bit went down */
172 	if ((mmio_read_32((uintptr_t)&base->control) & I2C_CONTROL_STOP) != 0) {
173 		ERROR("Stop bit didn't went down\n");
174 		return -EPERM;
175 	}
176 
177 	/* check the status */
178 	if (mentor_i2c_lost_arbitration(&status)) {
179 		ERROR("%s - %d: Lost arbitration, got status %x\n",
180 		      __func__, __LINE__, status);
181 		return -EAGAIN;
182 	}
183 	if (status != I2C_STATUS_IDLE) {
184 		ERROR("Got status %x after enable stop bit.\n", status);
185 		return -EPERM;
186 	}
187 
188 	return 0;
189 }
190 
191 static int mentor_i2c_address_set(uint8_t chain, int command)
192 {
193 	uint32_t reg, status;
194 
195 	reg = (chain << I2C_DATA_ADDR_7BIT_OFFS) & I2C_DATA_ADDR_7BIT_MASK;
196 	reg |= command;
197 	mmio_write_32((uintptr_t)&base->data, reg);
198 	udelay(1);
199 
200 	mentor_i2c_interrupt_clear();
201 
202 	if (mentor_i2c_wait_interrupt()) {
203 		ERROR("Start clear bit timeout\n");
204 		return -ETIMEDOUT;
205 	}
206 
207 	/* check the status */
208 	if (mentor_i2c_lost_arbitration(&status)) {
209 		ERROR("%s - %d: Lost arbitration, got status %x\n",
210 		      __func__, __LINE__, status);
211 		return -EAGAIN;
212 	}
213 	if (((status != I2C_STATUS_ADDR_R_ACK) && (command == I2C_CMD_READ)) ||
214 	   ((status != I2C_STATUS_ADDR_W_ACK) && (command == I2C_CMD_WRITE))) {
215 		/* only in debug, since in boot we try to read the SPD
216 		 * of both DRAM, and we don't want error messages in cas
217 		 * DIMM doesn't exist.
218 		 */
219 		INFO("%s: ERROR - status %x addr in %s mode.\n", __func__,
220 		     status, (command == I2C_CMD_WRITE) ? "Write" : "Read");
221 		return -EPERM;
222 	}
223 
224 	return 0;
225 }
226 
227 /*
228  * The I2C module contains a clock divider to generate the SCL clock.
229  * This function calculates and sets the <N> and <M> fields in the I2C Baud
230  * Rate Register (t=01) to obtain given 'requested_speed'.
231  * The requested_speed will be equal to:
232  * CONFIG_SYS_TCLK / (10 * (M + 1) * (2 << N))
233  * Where M is the value represented by bits[6:3] and N is the value represented
234  * by bits[2:0] of "I2C Baud Rate Register".
235  * Therefore max M which can be set is 16 (2^4) and max N is 8 (2^3). So the
236  * lowest possible baudrate is:
237  * CONFIG_SYS_TCLK/(10 * (16 +1) * (2 << 8), which equals to:
238  * CONFIG_SYS_TCLK/87040. Assuming that CONFIG_SYS_TCLK=250MHz, the lowest
239  * possible frequency is ~2,872KHz.
240  */
241 static unsigned int mentor_i2c_bus_speed_set(unsigned int requested_speed)
242 {
243 	unsigned int n, m, freq, margin, min_margin = 0xffffffff;
244 	unsigned int actual_n = 0, actual_m = 0;
245 	int val;
246 
247 	/* Calculate N and M for the TWSI clock baud rate */
248 	for (n = 0; n < 8; n++) {
249 		for (m = 0; m < 16; m++) {
250 			freq = CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
251 			val = requested_speed - freq;
252 			margin = (val > 0) ? val : -val;
253 
254 			if ((freq <= requested_speed) &&
255 			    (margin < min_margin)) {
256 				min_margin = margin;
257 				actual_n = n;
258 				actual_m = m;
259 			}
260 		}
261 	}
262 	VERBOSE("%s: actual_n = %u, actual_m = %u\n",
263 		__func__, actual_n, actual_m);
264 	/* Set the baud rate */
265 	mmio_write_32((uintptr_t)&base->baudrate, (actual_m << 3) | actual_n);
266 
267 	return 0;
268 }
269 
270 #ifdef DEBUG_I2C
271 static int mentor_i2c_probe(uint8_t chip)
272 {
273 	int ret = 0;
274 
275 	ret = mentor_i2c_start_bit_set();
276 	if (ret != 0) {
277 		mentor_i2c_stop_bit_set();
278 		ERROR("%s - %d: %s", __func__, __LINE__,
279 		      "mentor_i2c_start_bit_set failed\n");
280 		return -EPERM;
281 	}
282 
283 	ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE);
284 	if (ret != 0) {
285 		mentor_i2c_stop_bit_set();
286 		ERROR("%s - %d: %s", __func__, __LINE__,
287 		      "mentor_i2c_address_set failed\n");
288 		return -EPERM;
289 	}
290 
291 	mentor_i2c_stop_bit_set();
292 
293 	VERBOSE("%s: successful I2C probe\n", __func__);
294 
295 	return ret;
296 }
297 #endif
298 
299 /* regular i2c transaction */
300 static int mentor_i2c_data_receive(uint8_t *p_block, uint32_t block_size)
301 {
302 	uint32_t reg, status, block_size_read = block_size;
303 
304 	/* Wait for cause interrupt */
305 	if (mentor_i2c_wait_interrupt()) {
306 		ERROR("Start clear bit timeout\n");
307 		return -ETIMEDOUT;
308 	}
309 	while (block_size_read) {
310 		if (block_size_read == 1) {
311 			reg = mmio_read_32((uintptr_t)&base->control);
312 			reg &= ~(I2C_CONTROL_ACK);
313 			mmio_write_32((uintptr_t)&base->control, reg);
314 		}
315 		mentor_i2c_interrupt_clear();
316 
317 		if (mentor_i2c_wait_interrupt()) {
318 			ERROR("Start clear bit timeout\n");
319 			return -ETIMEDOUT;
320 		}
321 		/* check the status */
322 		if (mentor_i2c_lost_arbitration(&status)) {
323 			ERROR("%s - %d: Lost arbitration, got status %x\n",
324 			      __func__, __LINE__, status);
325 			return -EAGAIN;
326 		}
327 		if ((status != I2C_STATUS_DATA_R_ACK) &&
328 		    (block_size_read != 1)) {
329 			ERROR("Status %x in read transaction\n", status);
330 			return -EPERM;
331 		}
332 		if ((status != I2C_STATUS_DATA_R_NAK) &&
333 		    (block_size_read == 1)) {
334 			ERROR("Status %x in Rd Terminate\n", status);
335 			return -EPERM;
336 		}
337 
338 		/* read the data */
339 		*p_block = (uint8_t) mmio_read_32((uintptr_t)&base->data);
340 		VERBOSE("%s: place %d read %x\n", __func__,
341 			block_size - block_size_read, *p_block);
342 		p_block++;
343 		block_size_read--;
344 	}
345 
346 	return 0;
347 }
348 
349 static int mentor_i2c_data_transmit(uint8_t *p_block, uint32_t block_size)
350 {
351 	uint32_t status, block_size_write = block_size;
352 
353 	if (mentor_i2c_wait_interrupt()) {
354 		ERROR("Start clear bit timeout\n");
355 		return -ETIMEDOUT;
356 	}
357 
358 	while (block_size_write) {
359 		/* write the data */
360 		mmio_write_32((uintptr_t)&base->data, (uint32_t) *p_block);
361 		VERBOSE("%s: index = %d, data = %x\n", __func__,
362 			block_size - block_size_write, *p_block);
363 		p_block++;
364 		block_size_write--;
365 
366 		mentor_i2c_interrupt_clear();
367 
368 		if (mentor_i2c_wait_interrupt()) {
369 			ERROR("Start clear bit timeout\n");
370 			return -ETIMEDOUT;
371 		}
372 
373 		/* check the status */
374 		if (mentor_i2c_lost_arbitration(&status)) {
375 			ERROR("%s - %d: Lost arbitration, got status %x\n",
376 			      __func__, __LINE__, status);
377 			return -EAGAIN;
378 		}
379 		if (status != I2C_STATUS_DATA_W_ACK) {
380 			ERROR("Status %x in write transaction\n", status);
381 			return -EPERM;
382 		}
383 	}
384 
385 	return 0;
386 }
387 
388 static int mentor_i2c_target_offset_set(uint8_t chip, uint32_t addr, int alen)
389 {
390 	uint8_t off_block[2];
391 	uint32_t off_size;
392 
393 	if (alen == 2) { /* 2-byte addresses support */
394 		off_block[0] = (addr >> 8) & 0xff;
395 		off_block[1] = addr & 0xff;
396 		off_size = 2;
397 	} else { /* 1-byte addresses support */
398 		off_block[0] = addr & 0xff;
399 		off_size = 1;
400 	}
401 	VERBOSE("%s: off_size = %x addr1 = %x addr2 = %x\n", __func__,
402 		off_size, off_block[0], off_block[1]);
403 	return mentor_i2c_data_transmit(off_block, off_size);
404 }
405 
406 #ifdef I2C_CAN_UNSTUCK
407 static int mentor_i2c_unstuck(int ret)
408 {
409 	uint32_t v;
410 
411 	if (ret != -ETIMEDOUT)
412 		return ret;
413 	VERBOSE("Trying to \"unstuck i2c\"... ");
414 	i2c_init(base);
415 	mmio_write_32((uintptr_t)&base->unstuck, I2C_UNSTUCK_TRIGGER);
416 	do {
417 		v = mmio_read_32((uintptr_t)&base->unstuck);
418 	} while (v & I2C_UNSTUCK_ONGOING);
419 
420 	if (v & I2C_UNSTUCK_ERROR) {
421 		VERBOSE("failed - soft reset i2c\n");
422 		ret = -EPERM;
423 	} else {
424 		VERBOSE("ok\n");
425 		i2c_init(base);
426 		ret = -EAGAIN;
427 	}
428 	return ret;
429 }
430 #else
431 static int mentor_i2c_unstuck(int ret)
432 {
433 	VERBOSE("Cannot \"unstuck i2c\" - soft reset i2c\n");
434 	return -EPERM;
435 }
436 #endif
437 
438 /*
439  * API Functions
440  */
441 void i2c_init(void *i2c_base)
442 {
443 	/* For I2C speed and slave address, now we do not set them since
444 	 * we just provide the working speed and slave address otherwhere
445 	 * for i2c_init
446 	 */
447 	base = (struct mentor_i2c_regs *)i2c_base;
448 
449 	/* Reset the I2C logic */
450 	mmio_write_32((uintptr_t)&base->soft_reset, 0);
451 
452 	udelay(200);
453 
454 	mentor_i2c_bus_speed_set(CONFIG_SYS_I2C_SPEED);
455 
456 	/* Enable the I2C and slave */
457 	mmio_write_32((uintptr_t)&base->control,
458 		      I2C_CONTROL_TWSIEN | I2C_CONTROL_ACK);
459 
460 	/* set the I2C slave address */
461 	mmio_write_32((uintptr_t)&base->xtnd_slave_addr, 0);
462 	mmio_write_32((uintptr_t)&base->slave_address, CONFIG_SYS_I2C_SLAVE);
463 
464 	/* unmask I2C interrupt */
465 	mmio_write_32((uintptr_t)&base->control,
466 		      mmio_read_32((uintptr_t)&base->control) |
467 		      I2C_CONTROL_INTEN);
468 
469 	udelay(10);
470 }
471 
472 /*
473  * i2c_read: - Read multiple bytes from an i2c device
474  *
475  * The higher level routines take into account that this function is only
476  * called with len < page length of the device (see configuration file)
477  *
478  * @chip:	address of the chip which is to be read
479  * @addr:	i2c data address within the chip
480  * @alen:	length of the i2c data address (1..2 bytes)
481  * @buffer:	where to write the data
482  * @len:	how much byte do we want to read
483  * @return:	0 in case of success
484  */
485 int i2c_read(uint8_t chip, uint32_t addr, int alen, uint8_t *buffer, int len)
486 {
487 	int ret = 0;
488 	uint32_t counter = 0;
489 
490 #ifdef DEBUG_I2C
491 	mentor_i2c_probe(chip);
492 #endif
493 
494 	do {
495 		if (ret != -EAGAIN && ret) {
496 			ERROR("i2c transaction failed, after %d retries\n",
497 			      counter);
498 			mentor_i2c_stop_bit_set();
499 			return ret;
500 		}
501 
502 		/* wait for 1 us for the interrupt clear to take effect */
503 		if (counter > 0)
504 			udelay(1);
505 		counter++;
506 
507 		ret = mentor_i2c_start_bit_set();
508 		if (ret) {
509 			ret = mentor_i2c_unstuck(ret);
510 			continue;
511 		}
512 
513 		/* if EEPROM device */
514 		if (alen != 0) {
515 			ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE);
516 			if (ret)
517 				continue;
518 
519 			ret = mentor_i2c_target_offset_set(chip, addr, alen);
520 			if (ret)
521 				continue;
522 			ret = mentor_i2c_start_bit_set();
523 			if (ret)
524 				continue;
525 		}
526 
527 		ret =  mentor_i2c_address_set(chip, I2C_CMD_READ);
528 		if (ret)
529 			continue;
530 
531 		ret = mentor_i2c_data_receive(buffer, len);
532 		if (ret)
533 			continue;
534 
535 		ret =  mentor_i2c_stop_bit_set();
536 	} while ((ret == -EAGAIN) && (counter < I2C_MAX_RETRY_CNT));
537 
538 	if (counter == I2C_MAX_RETRY_CNT) {
539 		ERROR("I2C transactions failed, got EAGAIN %d times\n",
540 		      I2C_MAX_RETRY_CNT);
541 		ret = -EPERM;
542 	}
543 	mmio_write_32((uintptr_t)&base->control,
544 		      mmio_read_32((uintptr_t)&base->control) |
545 		      I2C_CONTROL_ACK);
546 
547 	udelay(1);
548 	return ret;
549 }
550 
551 /*
552  * i2c_write: -  Write multiple bytes to an i2c device
553  *
554  * The higher level routines take into account that this function is only
555  * called with len < page length of the device (see configuration file)
556  *
557  * @chip:	address of the chip which is to be written
558  * @addr:	i2c data address within the chip
559  * @alen:	length of the i2c data address (1..2 bytes)
560  * @buffer:	where to find the data to be written
561  * @len:	how much byte do we want to read
562  * @return:	0 in case of success
563  */
564 int i2c_write(uint8_t chip, uint32_t addr, int alen, uint8_t *buffer, int len)
565 {
566 	int ret = 0;
567 	uint32_t counter = 0;
568 
569 	do {
570 		if (ret != -EAGAIN && ret) {
571 			ERROR("i2c transaction failed\n");
572 			mentor_i2c_stop_bit_set();
573 			return ret;
574 		}
575 		/* wait for 1 us for the interrupt clear to take effect */
576 		if (counter > 0)
577 			udelay(1);
578 		counter++;
579 
580 		ret = mentor_i2c_start_bit_set();
581 		if (ret) {
582 			ret = mentor_i2c_unstuck(ret);
583 			continue;
584 		}
585 
586 		ret = mentor_i2c_address_set(chip, I2C_CMD_WRITE);
587 		if (ret)
588 			continue;
589 
590 		/* if EEPROM device */
591 		if (alen != 0) {
592 			ret = mentor_i2c_target_offset_set(chip, addr, alen);
593 			if (ret)
594 				continue;
595 		}
596 
597 		ret = mentor_i2c_data_transmit(buffer, len);
598 		if (ret)
599 			continue;
600 
601 		ret = mentor_i2c_stop_bit_set();
602 	} while ((ret == -EAGAIN) && (counter < I2C_MAX_RETRY_CNT));
603 
604 	if (counter == I2C_MAX_RETRY_CNT) {
605 		ERROR("I2C transactions failed, got EAGAIN %d times\n",
606 		      I2C_MAX_RETRY_CNT);
607 		ret = -EPERM;
608 	}
609 
610 	udelay(1);
611 	return ret;
612 }
613