10ade8cd8SKonstantin Porotchkin /* 20ade8cd8SKonstantin Porotchkin * Copyright (C) 2018 Marvell International Ltd. 30ade8cd8SKonstantin Porotchkin * 40ade8cd8SKonstantin Porotchkin * SPDX-License-Identifier: BSD-3-Clause 50ade8cd8SKonstantin Porotchkin * https://spdx.org/licenses 60ade8cd8SKonstantin Porotchkin */ 70ade8cd8SKonstantin Porotchkin 80ade8cd8SKonstantin Porotchkin /* Marvell CP110 SoC COMPHY unit driver */ 90ade8cd8SKonstantin Porotchkin 100ade8cd8SKonstantin Porotchkin int mvebu_cp110_comphy_is_pll_locked(uint64_t comphy_base, 11*f858e989SGrzegorz Jaszczyk uint8_t comphy_index); 120ade8cd8SKonstantin Porotchkin int mvebu_cp110_comphy_power_off(uint64_t comphy_base, 13*f858e989SGrzegorz Jaszczyk uint8_t comphy_index); 140ade8cd8SKonstantin Porotchkin int mvebu_cp110_comphy_power_on(uint64_t comphy_base, 15*f858e989SGrzegorz Jaszczyk uint8_t comphy_index, uint64_t comphy_mode); 160ade8cd8SKonstantin Porotchkin int mvebu_cp110_comphy_xfi_rx_training(uint64_t comphy_base, 170ade8cd8SKonstantin Porotchkin uint8_t comphy_index); 180ade8cd8SKonstantin Porotchkin int mvebu_cp110_comphy_digital_reset(uint64_t comphy_base, uint8_t comphy_index, 190ade8cd8SKonstantin Porotchkin uint32_t comphy_mode, uint32_t command); 20