1598cee48SBryan O'Donoghue /* 2598cee48SBryan O'Donoghue * Copyright (c) Linaro 2018 Limited and Contributors. All rights reserved. 3598cee48SBryan O'Donoghue * 4598cee48SBryan O'Donoghue * SPDX-License-Identifier: BSD-3-Clause 5598cee48SBryan O'Donoghue */ 6c3cf06f1SAntonio Nino Diaz #ifndef IMX_UART_H 7c3cf06f1SAntonio Nino Diaz #define IMX_UART_H 8598cee48SBryan O'Donoghue 970086dc4SYing-Chun Liu (PaulLiu) #include <drivers/console.h> 1070086dc4SYing-Chun Liu (PaulLiu) 11598cee48SBryan O'Donoghue #define IMX_UART_RXD_OFFSET 0x00 12598cee48SBryan O'Donoghue #define IMX_UART_RXD_CHARRDY BIT(15) 13598cee48SBryan O'Donoghue #define IMX_UART_RXD_ERR BIT(14) 14598cee48SBryan O'Donoghue #define IMX_UART_RXD_OVERRUN BIT(13) 15598cee48SBryan O'Donoghue #define IMX_UART_RXD_FRMERR BIT(12) 16598cee48SBryan O'Donoghue #define IMX_UART_RXD_BRK BIT(11) 17598cee48SBryan O'Donoghue #define IMX_UART_RXD_PRERR BIT(10) 18598cee48SBryan O'Donoghue 19598cee48SBryan O'Donoghue #define IMX_UART_TXD_OFFSET 0x40 20598cee48SBryan O'Donoghue 21598cee48SBryan O'Donoghue #define IMX_UART_CR1_OFFSET 0x80 22598cee48SBryan O'Donoghue #define IMX_UART_CR1_ADEN BIT(15) 23598cee48SBryan O'Donoghue #define IMX_UART_CR1_ADBR BIT(14) 24598cee48SBryan O'Donoghue #define IMX_UART_CR1_TRDYEN BIT(13) 25598cee48SBryan O'Donoghue #define IMX_UART_CR1_IDEN BIT(12) 26598cee48SBryan O'Donoghue #define IMX_UART_CR1_RRDYEN BIT(9) 27598cee48SBryan O'Donoghue #define IMX_UART_CR1_RXDMAEN BIT(8) 28598cee48SBryan O'Donoghue #define IMX_UART_CR1_IREN BIT(7) 29598cee48SBryan O'Donoghue #define IMX_UART_CR1_TXMPTYEN BIT(6) 30598cee48SBryan O'Donoghue #define IMX_UART_CR1_RTSDEN BIT(5) 31598cee48SBryan O'Donoghue #define IMX_UART_CR1_SNDBRK BIT(4) 32598cee48SBryan O'Donoghue #define IMX_UART_CR1_TXDMAEN BIT(3) 33598cee48SBryan O'Donoghue #define IMX_UART_CR1_ATDMAEN BIT(2) 34598cee48SBryan O'Donoghue #define IMX_UART_CR1_DOZE BIT(1) 35598cee48SBryan O'Donoghue #define IMX_UART_CR1_UARTEN BIT(0) 36598cee48SBryan O'Donoghue 37598cee48SBryan O'Donoghue #define IMX_UART_CR2_OFFSET 0x84 38598cee48SBryan O'Donoghue #define IMX_UART_CR2_ESCI BIT(15) 39598cee48SBryan O'Donoghue #define IMX_UART_CR2_IRTS BIT(14) 40598cee48SBryan O'Donoghue #define IMX_UART_CR2_CTSC BIT(13) 41598cee48SBryan O'Donoghue #define IMX_UART_CR2_CTS BIT(12) 42598cee48SBryan O'Donoghue #define IMX_UART_CR2_ESCEN BIT(11) 43598cee48SBryan O'Donoghue #define IMX_UART_CR2_PREN BIT(8) 44598cee48SBryan O'Donoghue #define IMX_UART_CR2_PROE BIT(7) 45598cee48SBryan O'Donoghue #define IMX_UART_CR2_STPB BIT(6) 46598cee48SBryan O'Donoghue #define IMX_UART_CR2_WS BIT(5) 47598cee48SBryan O'Donoghue #define IMX_UART_CR2_RTSEN BIT(4) 48598cee48SBryan O'Donoghue #define IMX_UART_CR2_ATEN BIT(3) 49598cee48SBryan O'Donoghue #define IMX_UART_CR2_TXEN BIT(2) 50598cee48SBryan O'Donoghue #define IMX_UART_CR2_RXEN BIT(1) 51598cee48SBryan O'Donoghue #define IMX_UART_CR2_SRST BIT(0) 52598cee48SBryan O'Donoghue 53598cee48SBryan O'Donoghue #define IMX_UART_CR3_OFFSET 0x88 54598cee48SBryan O'Donoghue #define IMX_UART_CR3_DTREN BIT(13) 55598cee48SBryan O'Donoghue #define IMX_UART_CR3_PARERREN BIT(12) 56598cee48SBryan O'Donoghue #define IMX_UART_CR3_FARERREN BIT(11) 57598cee48SBryan O'Donoghue #define IMX_UART_CR3_DSD BIT(10) 58598cee48SBryan O'Donoghue #define IMX_UART_CR3_DCD BIT(9) 59598cee48SBryan O'Donoghue #define IMX_UART_CR3_RI BIT(8) 60598cee48SBryan O'Donoghue #define IMX_UART_CR3_ADNIMP BIT(7) 61598cee48SBryan O'Donoghue #define IMX_UART_CR3_RXDSEN BIT(6) 62598cee48SBryan O'Donoghue #define IMX_UART_CR3_AIRINTEN BIT(5) 63598cee48SBryan O'Donoghue #define IMX_UART_CR3_AWAKEN BIT(4) 64598cee48SBryan O'Donoghue #define IMX_UART_CR3_DTRDEN BIT(3) 65598cee48SBryan O'Donoghue #define IMX_UART_CR3_RXDMUXSEL BIT(2) 66598cee48SBryan O'Donoghue #define IMX_UART_CR3_INVT BIT(1) 67598cee48SBryan O'Donoghue #define IMX_UART_CR3_ACIEN BIT(0) 68598cee48SBryan O'Donoghue 69598cee48SBryan O'Donoghue #define IMX_UART_CR4_OFFSET 0x8c 70598cee48SBryan O'Donoghue #define IMX_UART_CR4_INVR BIT(9) 71598cee48SBryan O'Donoghue #define IMX_UART_CR4_ENIRI BIT(8) 72598cee48SBryan O'Donoghue #define IMX_UART_CR4_WKEN BIT(7) 73598cee48SBryan O'Donoghue #define IMX_UART_CR4_IDDMAEN BIT(6) 74598cee48SBryan O'Donoghue #define IMX_UART_CR4_IRSC BIT(5) 75598cee48SBryan O'Donoghue #define IMX_UART_CR4_LPBYP BIT(4) 76598cee48SBryan O'Donoghue #define IMX_UART_CR4_TCEN BIT(3) 77598cee48SBryan O'Donoghue #define IMX_UART_CR4_BKEN BIT(2) 78598cee48SBryan O'Donoghue #define IMX_UART_CR4_OREN BIT(1) 79598cee48SBryan O'Donoghue #define IMX_UART_CR4_DREN BIT(0) 80598cee48SBryan O'Donoghue 81598cee48SBryan O'Donoghue #define IMX_UART_FCR_OFFSET 0x90 82598cee48SBryan O'Donoghue #define IMX_UART_FCR_TXTL_MASK (BIT(15) | BIT(14) | BIT(13) | BIT(12) |\ 83598cee48SBryan O'Donoghue BIT(11) | BIT(10)) 84598cee48SBryan O'Donoghue #define IMX_UART_FCR_TXTL(x) ((x) << 10) 85598cee48SBryan O'Donoghue #define IMX_UART_FCR_RFDIV_MASK (BIT(9) | BIT(8) | BIT(7)) 86598cee48SBryan O'Donoghue #define IMX_UART_FCR_RFDIV7 (BIT(9) | BIT(8)) 87598cee48SBryan O'Donoghue #define IMX_UART_FCR_RFDIV1 (BIT(9) | BIT(7)) 88598cee48SBryan O'Donoghue #define IMX_UART_FCR_RFDIV2 BIT(9) 89598cee48SBryan O'Donoghue #define IMX_UART_FCR_RFDIV3 (BIT(8) | BIT(7)) 90598cee48SBryan O'Donoghue #define IMX_UART_FCR_RFDIV4 BIT(8) 91598cee48SBryan O'Donoghue #define IMX_UART_FCR_RFDIV5 BIT(7) 92598cee48SBryan O'Donoghue #define IMX_UART_FCR_RFDIV6 0 93598cee48SBryan O'Donoghue #define IMX_UART_FCR_DCEDTE BIT(6) 94598cee48SBryan O'Donoghue #define IMX_UART_FCR_RXTL_MASK (BIT(5) | BIT(4) | BIT(3) | BIT(2) |\ 95598cee48SBryan O'Donoghue BIT(1) | BIT(0)) 96598cee48SBryan O'Donoghue #define IMX_UART_FCR_RXTL(x) x 97598cee48SBryan O'Donoghue 98598cee48SBryan O'Donoghue #define IMX_UART_STAT1_OFFSET 0x94 99598cee48SBryan O'Donoghue #define IMX_UART_STAT1_PARITYERR BIT(15) 100598cee48SBryan O'Donoghue #define IMX_UART_STAT1_RTSS BIT(14) 101598cee48SBryan O'Donoghue #define IMX_UART_STAT1_TRDY BIT(13) 102598cee48SBryan O'Donoghue #define IMX_UART_STAT1_RTSD BIT(12) 103598cee48SBryan O'Donoghue #define IMX_UART_STAT1_ESCF BIT(11) 104598cee48SBryan O'Donoghue #define IMX_UART_STAT1_FRAMEERR BIT(10) 105598cee48SBryan O'Donoghue #define IMX_UART_STAT1_RRDY BIT(9) 106598cee48SBryan O'Donoghue #define IMX_UART_STAT1_AGTIM BIT(8) 107598cee48SBryan O'Donoghue #define IMX_UART_STAT1_DTRD BIT(7) 108598cee48SBryan O'Donoghue #define IMX_UART_STAT1_RXDS BIT(6) 109598cee48SBryan O'Donoghue #define IMX_UART_STAT1_AIRINT BIT(5) 110598cee48SBryan O'Donoghue #define IMX_UART_STAT1_AWAKE BIT(4) 111598cee48SBryan O'Donoghue #define IMX_UART_STAT1_SAD BIT(3) 112598cee48SBryan O'Donoghue 113598cee48SBryan O'Donoghue #define IMX_UART_STAT2_OFFSET 0x98 114598cee48SBryan O'Donoghue #define IMX_UART_STAT2_ADET BIT(15) 115598cee48SBryan O'Donoghue #define IMX_UART_STAT2_TXFE BIT(14) 116598cee48SBryan O'Donoghue #define IMX_UART_STAT2_DTRF BIT(13) 117598cee48SBryan O'Donoghue #define IMX_UART_STAT2_IDLE BIT(12) 118598cee48SBryan O'Donoghue #define IMX_UART_STAT2_ACST BIT(11) 119598cee48SBryan O'Donoghue #define IMX_UART_STAT2_RIDELT BIT(10) 120598cee48SBryan O'Donoghue #define IMX_UART_STAT2_RIIN BIT(9) 121598cee48SBryan O'Donoghue #define IMX_UART_STAT2_IRINT BIT(8) 122598cee48SBryan O'Donoghue #define IMX_UART_STAT2_WAKE BIT(7) 123598cee48SBryan O'Donoghue #define IMX_UART_STAT2_DCDDELT BIT(6) 124598cee48SBryan O'Donoghue #define IMX_UART_STAT2_DCDIN BIT(5) 125598cee48SBryan O'Donoghue #define IMX_UART_STAT2_RTSF BIT(4) 126598cee48SBryan O'Donoghue #define IMX_UART_STAT2_TXDC BIT(3) 127598cee48SBryan O'Donoghue #define IMX_UART_STAT2_BRCD BIT(2) 128598cee48SBryan O'Donoghue #define IMX_UART_STAT2_ORE BIT(1) 129598cee48SBryan O'Donoghue #define IMX_UART_STAT2_RCR BIT(0) 130598cee48SBryan O'Donoghue 131598cee48SBryan O'Donoghue #define IMX_UART_ESC_OFFSET 0x9c 132598cee48SBryan O'Donoghue 133598cee48SBryan O'Donoghue #define IMX_UART_TIM_OFFSET 0xa0 134598cee48SBryan O'Donoghue 135598cee48SBryan O'Donoghue #define IMX_UART_BIR_OFFSET 0xa4 136598cee48SBryan O'Donoghue 137598cee48SBryan O'Donoghue #define IMX_UART_BMR_OFFSET 0xa8 138598cee48SBryan O'Donoghue 139598cee48SBryan O'Donoghue #define IMX_UART_BRC_OFFSET 0xac 140598cee48SBryan O'Donoghue 141598cee48SBryan O'Donoghue #define IMX_UART_ONEMS_OFFSET 0xb0 142598cee48SBryan O'Donoghue 143598cee48SBryan O'Donoghue #define IMX_UART_TS_OFFSET 0xb4 144598cee48SBryan O'Donoghue #define IMX_UART_TS_FRCPERR BIT(13) 145598cee48SBryan O'Donoghue #define IMX_UART_TS_LOOP BIT(12) 146598cee48SBryan O'Donoghue #define IMX_UART_TS_DBGEN BIT(11) 147598cee48SBryan O'Donoghue #define IMX_UART_TS_LOOPIR BIT(10) 148598cee48SBryan O'Donoghue #define IMX_UART_TS_RXDBG BIT(9) 149598cee48SBryan O'Donoghue #define IMX_UART_TS_TXEMPTY BIT(6) 150598cee48SBryan O'Donoghue #define IMX_UART_TS_RXEMPTY BIT(5) 151598cee48SBryan O'Donoghue #define IMX_UART_TS_TXFULL BIT(4) 152598cee48SBryan O'Donoghue #define IMX_UART_TS_RXFULL BIT(3) 153598cee48SBryan O'Donoghue #define IMX_UART_TS_SOFTRST BIT(0) 154598cee48SBryan O'Donoghue 155d5dfdeb6SJulius Werner #ifndef __ASSEMBLER__ 15670086dc4SYing-Chun Liu (PaulLiu) 15770086dc4SYing-Chun Liu (PaulLiu) int console_imx_uart_register(uintptr_t baseaddr, 15870086dc4SYing-Chun Liu (PaulLiu) uint32_t clock, 15970086dc4SYing-Chun Liu (PaulLiu) uint32_t baud, 160*d7873bcdSAndre Przywara console_t *console); 161d5dfdeb6SJulius Werner #endif /*__ASSEMBLER__*/ 16270086dc4SYing-Chun Liu (PaulLiu) 163c3cf06f1SAntonio Nino Diaz #endif /* IMX_UART_H */ 164