1 /* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <arch_helpers.h> 10 #include <common/bl_common.h> 11 #include <common/debug.h> 12 #include <drivers/delay_timer.h> 13 #include <drivers/generic_delay_timer.h> 14 #include <plat/common/platform.h> 15 16 /* Ticks elapsed in one second by a signal of 1 MHz */ 17 #define MHZ_TICKS_PER_SEC 1000000 18 19 static timer_ops_t ops; 20 21 static uint32_t get_timer_value(void) 22 { 23 /* 24 * Generic delay timer implementation expects the timer to be a down 25 * counter. We apply bitwise NOT operator to the tick values returned 26 * by read_cntpct_el0() to simulate the down counter. The value is 27 * clipped from 64 to 32 bits. 28 */ 29 return (uint32_t)(~read_cntpct_el0()); 30 } 31 32 void generic_delay_timer_init_args(uint32_t mult, uint32_t div) 33 { 34 ops.get_timer_value = get_timer_value; 35 ops.clk_mult = mult; 36 ops.clk_div = div; 37 38 timer_init(&ops); 39 40 VERBOSE("Generic delay timer configured with mult=%u and div=%u\n", 41 mult, div); 42 } 43 44 void generic_delay_timer_init(void) 45 { 46 /* Value in ticks */ 47 unsigned int mult = MHZ_TICKS_PER_SEC; 48 49 /* Value in ticks per second (Hz) */ 50 unsigned int div = plat_get_syscnt_freq2(); 51 52 /* Reduce multiplier and divider by dividing them repeatedly by 10 */ 53 while (((mult % 10U) == 0U) && ((div % 10U) == 0U)) { 54 mult /= 10U; 55 div /= 10U; 56 } 57 58 generic_delay_timer_init_args(mult, div); 59 } 60 61