xref: /rk3399_ARM-atf/drivers/arm/tzc/tzc_dmc500.c (revision 82cb2c1ad9897473743f08437d0a3995bed561b9)
1f568604bSVikram Kanigiri /*
2239b085cSAntonio Nino Diaz  * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
3f568604bSVikram Kanigiri  *
4*82cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
5f568604bSVikram Kanigiri  */
6f568604bSVikram Kanigiri 
7f568604bSVikram Kanigiri #include <assert.h>
8f568604bSVikram Kanigiri #include <debug.h>
9f568604bSVikram Kanigiri #include <mmio.h>
10f568604bSVikram Kanigiri #include <tzc_dmc500.h>
11f568604bSVikram Kanigiri #include "tzc_common.h"
12239b085cSAntonio Nino Diaz #include "tzc_common_private.h"
13f568604bSVikram Kanigiri 
14f568604bSVikram Kanigiri /*
15f568604bSVikram Kanigiri  * Macros which will be used by common core functions.
16f568604bSVikram Kanigiri  */
17f568604bSVikram Kanigiri #define TZC_DMC500_REGION_BASE_LOW_0_OFFSET		0x054
18f568604bSVikram Kanigiri #define TZC_DMC500_REGION_BASE_HIGH_0_OFFSET		0x058
19f568604bSVikram Kanigiri #define TZC_DMC500_REGION_TOP_LOW_0_OFFSET		0x05C
20f568604bSVikram Kanigiri #define TZC_DMC500_REGION_TOP_HIGH_0_OFFSET		0x060
21f568604bSVikram Kanigiri #define TZC_DMC500_REGION_ATTR_0_OFFSET			0x064
22f568604bSVikram Kanigiri #define TZC_DMC500_REGION_ID_ACCESS_0_OFFSET		0x068
23f568604bSVikram Kanigiri 
24f568604bSVikram Kanigiri #define TZC_DMC500_ACTION_OFF				0x50
25f568604bSVikram Kanigiri 
26f568604bSVikram Kanigiri /* Pointer to the tzc_dmc500_driver_data structure populated by the platform */
27f568604bSVikram Kanigiri static const tzc_dmc500_driver_data_t *g_driver_data;
28f568604bSVikram Kanigiri 
29f568604bSVikram Kanigiri #define verify_region_attr(region, attr)	\
30f568604bSVikram Kanigiri 		((g_conf_regions[(region)].sec_attr ==			\
31f568604bSVikram Kanigiri 			((attr) >> TZC_REGION_ATTR_SEC_SHIFT))		\
32f568604bSVikram Kanigiri 		&& ((attr) & (0x1 << TZC_REGION_ATTR_F_EN_SHIFT)))
33f568604bSVikram Kanigiri 
34f568604bSVikram Kanigiri /*
35f568604bSVikram Kanigiri  * Structure for configured regions attributes in DMC500.
36f568604bSVikram Kanigiri  */
37f568604bSVikram Kanigiri typedef struct tzc_dmc500_regions {
38f568604bSVikram Kanigiri 	tzc_region_attributes_t sec_attr;
39f568604bSVikram Kanigiri 	int is_enabled;
40f568604bSVikram Kanigiri } tzc_dmc500_regions_t;
41f568604bSVikram Kanigiri 
42f568604bSVikram Kanigiri /*
43f568604bSVikram Kanigiri  * Array storing the attributes of the configured regions. This array
44f568604bSVikram Kanigiri  * will be used by the `tzc_dmc500_verify_complete` to verify the flush
45f568604bSVikram Kanigiri  * completion.
46f568604bSVikram Kanigiri  */
47f568604bSVikram Kanigiri static tzc_dmc500_regions_t g_conf_regions[MAX_REGION_VAL + 1];
48f568604bSVikram Kanigiri 
49f568604bSVikram Kanigiri /* Helper Macros for making the code readable */
50f568604bSVikram Kanigiri #define DMC_INST_BASE_ADDR(instance) (g_driver_data->dmc_base[instance])
51f568604bSVikram Kanigiri #define DMC_INST_SI_BASE(instance, interface) \
52f568604bSVikram Kanigiri 		(DMC_INST_BASE_ADDR(instance) + IFACE_OFFSET(interface))
53f568604bSVikram Kanigiri 
54f568604bSVikram Kanigiri DEFINE_TZC_COMMON_WRITE_ACTION(_dmc500, DMC500)
55f568604bSVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_BASE(_dmc500, DMC500)
56f568604bSVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_TOP(_dmc500, DMC500)
57f568604bSVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_ATTRIBUTES(_dmc500, DMC500)
58f568604bSVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_ID_ACCESS(_dmc500, DMC500)
59f568604bSVikram Kanigiri 
60f568604bSVikram Kanigiri DEFINE_TZC_COMMON_CONFIGURE_REGION0(_dmc500)
61f568604bSVikram Kanigiri DEFINE_TZC_COMMON_CONFIGURE_REGION(_dmc500)
62f568604bSVikram Kanigiri 
63f568604bSVikram Kanigiri static inline unsigned int _tzc_dmc500_read_region_attr_0(
64f568604bSVikram Kanigiri 					uintptr_t dmc_si_base,
65f568604bSVikram Kanigiri 					int region_no)
66f568604bSVikram Kanigiri {
67f568604bSVikram Kanigiri 	return mmio_read_32(dmc_si_base +
68f568604bSVikram Kanigiri 			TZC_REGION_OFFSET(TZC_DMC500_REGION_SIZE, region_no) +
69f568604bSVikram Kanigiri 			TZC_DMC500_REGION_ATTR_0_OFFSET);
70f568604bSVikram Kanigiri }
71f568604bSVikram Kanigiri 
72f568604bSVikram Kanigiri static inline void _tzc_dmc500_write_flush_control(uintptr_t dmc_si_base)
73f568604bSVikram Kanigiri {
74f568604bSVikram Kanigiri 	mmio_write_32(dmc_si_base + SI_FLUSH_CTRL_OFFSET, 1);
75f568604bSVikram Kanigiri }
76f568604bSVikram Kanigiri 
77f568604bSVikram Kanigiri /*
78f568604bSVikram Kanigiri  * Sets the Flush controls for all the DMC Instances and System Interfaces.
79f568604bSVikram Kanigiri  * This initiates the flush of configuration settings from the shadow
80f568604bSVikram Kanigiri  * registers to the actual configuration register. The caller should poll
81f568604bSVikram Kanigiri  * changed register to confirm update.
82f568604bSVikram Kanigiri  */
83f568604bSVikram Kanigiri void tzc_dmc500_config_complete(void)
84f568604bSVikram Kanigiri {
85f568604bSVikram Kanigiri 	int dmc_inst, sys_if;
86f568604bSVikram Kanigiri 
87f568604bSVikram Kanigiri 	assert(g_driver_data);
88f568604bSVikram Kanigiri 
89f568604bSVikram Kanigiri 	for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
90f568604bSVikram Kanigiri 		assert(DMC_INST_BASE_ADDR(dmc_inst));
91f568604bSVikram Kanigiri 		for (sys_if = 0; sys_if < MAX_SYS_IF_COUNT; sys_if++)
92f568604bSVikram Kanigiri 			_tzc_dmc500_write_flush_control(
93f568604bSVikram Kanigiri 					DMC_INST_SI_BASE(dmc_inst, sys_if));
94f568604bSVikram Kanigiri 	}
95f568604bSVikram Kanigiri }
96f568604bSVikram Kanigiri 
97f568604bSVikram Kanigiri /*
98f568604bSVikram Kanigiri  * This function reads back the secure attributes from the configuration
99f568604bSVikram Kanigiri  * register for each DMC Instance and System Interface and compares it with
100f568604bSVikram Kanigiri  * the configured value. The successful verification of the region attributes
101f568604bSVikram Kanigiri  * confirms that the flush operation has completed.
102f568604bSVikram Kanigiri  * If the verification fails, the caller is expected to invoke this API again
103f568604bSVikram Kanigiri  * till it succeeds.
104f568604bSVikram Kanigiri  * Returns 0 on success and 1 on failure.
105f568604bSVikram Kanigiri  */
106f568604bSVikram Kanigiri int tzc_dmc500_verify_complete(void)
107f568604bSVikram Kanigiri {
108f568604bSVikram Kanigiri 	int dmc_inst, sys_if, region_no;
109f568604bSVikram Kanigiri 	unsigned int attr;
110f568604bSVikram Kanigiri 
111f568604bSVikram Kanigiri 	assert(g_driver_data);
112f568604bSVikram Kanigiri 	/* Region 0 must be configured */
113f568604bSVikram Kanigiri 	assert(g_conf_regions[0].is_enabled);
114f568604bSVikram Kanigiri 
115f568604bSVikram Kanigiri 	/* Iterate over all configured regions */
116f568604bSVikram Kanigiri 	for (region_no = 0; region_no <= MAX_REGION_VAL; region_no++) {
117f568604bSVikram Kanigiri 		if (!g_conf_regions[region_no].is_enabled)
118f568604bSVikram Kanigiri 			continue;
119f568604bSVikram Kanigiri 		for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count;
120f568604bSVikram Kanigiri 								dmc_inst++) {
121f568604bSVikram Kanigiri 			assert(DMC_INST_BASE_ADDR(dmc_inst));
122f568604bSVikram Kanigiri 			for (sys_if = 0; sys_if < MAX_SYS_IF_COUNT;
123f568604bSVikram Kanigiri 							sys_if++) {
124f568604bSVikram Kanigiri 				attr = _tzc_dmc500_read_region_attr_0(
125f568604bSVikram Kanigiri 					DMC_INST_SI_BASE(dmc_inst, sys_if),
126f568604bSVikram Kanigiri 					region_no);
127f568604bSVikram Kanigiri 				VERBOSE("Verifying DMC500 region:%d"
128f568604bSVikram Kanigiri 					" dmc_inst:%d sys_if:%d attr:%x\n",
129f568604bSVikram Kanigiri 					region_no, dmc_inst, sys_if, attr);
130f568604bSVikram Kanigiri 				if (!verify_region_attr(region_no, attr))
131f568604bSVikram Kanigiri 					return 1;
132f568604bSVikram Kanigiri 			}
133f568604bSVikram Kanigiri 		}
134f568604bSVikram Kanigiri 	}
135f568604bSVikram Kanigiri 
136f568604bSVikram Kanigiri 	return 0;
137f568604bSVikram Kanigiri }
138f568604bSVikram Kanigiri 
139f568604bSVikram Kanigiri /*
140f568604bSVikram Kanigiri  * `tzc_dmc500_configure_region0` is used to program region 0 in both the
141f568604bSVikram Kanigiri  * system interfaces of all the DMC-500 instances. Region 0 covers the whole
142f568604bSVikram Kanigiri  * address space that is not mapped to any other region for a system interface,
143f568604bSVikram Kanigiri  * and is always enabled; this cannot be changed. This function only changes
144f568604bSVikram Kanigiri  * the access permissions.
145f568604bSVikram Kanigiri  */
146f568604bSVikram Kanigiri void tzc_dmc500_configure_region0(tzc_region_attributes_t sec_attr,
147f568604bSVikram Kanigiri 					unsigned int nsaid_permissions)
148f568604bSVikram Kanigiri {
149f568604bSVikram Kanigiri 	int dmc_inst, sys_if;
150f568604bSVikram Kanigiri 
151f568604bSVikram Kanigiri 	/* Assert if DMC-500 is not initialized */
152f568604bSVikram Kanigiri 	assert(g_driver_data);
153f568604bSVikram Kanigiri 
154f568604bSVikram Kanigiri 	/* Configure region_0 in all DMC instances */
155f568604bSVikram Kanigiri 	for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
156f568604bSVikram Kanigiri 		assert(DMC_INST_BASE_ADDR(dmc_inst));
157f568604bSVikram Kanigiri 		for (sys_if = 0; sys_if < MAX_SYS_IF_COUNT; sys_if++)
158f568604bSVikram Kanigiri 			_tzc_dmc500_configure_region0(
159f568604bSVikram Kanigiri 					DMC_INST_SI_BASE(dmc_inst, sys_if),
160f568604bSVikram Kanigiri 					sec_attr, nsaid_permissions);
161f568604bSVikram Kanigiri 	}
162f568604bSVikram Kanigiri 
163f568604bSVikram Kanigiri 	g_conf_regions[0].sec_attr = sec_attr;
164f568604bSVikram Kanigiri 	g_conf_regions[0].is_enabled = 1;
165f568604bSVikram Kanigiri }
166f568604bSVikram Kanigiri 
167f568604bSVikram Kanigiri /*
168f568604bSVikram Kanigiri  * `tzc_dmc500_configure_region` is used to program a region into all system
169f568604bSVikram Kanigiri  * interfaces of all the DMC instances.
170f568604bSVikram Kanigiri  * NOTE:
171f568604bSVikram Kanigiri  * Region 0 is special; it is preferable to use tzc_dmc500_configure_region0
172f568604bSVikram Kanigiri  * for this region (see comment for that function).
173f568604bSVikram Kanigiri  */
174f568604bSVikram Kanigiri void tzc_dmc500_configure_region(int region_no,
1759fbdb802SYatharth Kochar 			unsigned long long region_base,
1769fbdb802SYatharth Kochar 			unsigned long long region_top,
177f568604bSVikram Kanigiri 			tzc_region_attributes_t sec_attr,
178f568604bSVikram Kanigiri 			unsigned int nsaid_permissions)
179f568604bSVikram Kanigiri {
180f568604bSVikram Kanigiri 	int dmc_inst, sys_if;
181f568604bSVikram Kanigiri 
182f568604bSVikram Kanigiri 	assert(g_driver_data);
183f568604bSVikram Kanigiri 	/* Do range checks on regions. */
184f568604bSVikram Kanigiri 	assert(region_no >= 0 && region_no <= MAX_REGION_VAL);
185f568604bSVikram Kanigiri 
186f568604bSVikram Kanigiri 	/*
187f568604bSVikram Kanigiri 	 * Do address range check based on DMC-TZ configuration. A 43bit address
188f568604bSVikram Kanigiri 	 * is the max and expected case.
189f568604bSVikram Kanigiri 	 */
190367d0ffbSSoby Mathew 	assert(((region_top <= _tzc_get_max_top_addr(43)) &&
191f568604bSVikram Kanigiri 		(region_base < region_top)));
192f568604bSVikram Kanigiri 
193f568604bSVikram Kanigiri 	/* region_base and (region_top + 1) must be 4KB aligned */
194f568604bSVikram Kanigiri 	assert(((region_base | (region_top + 1)) & (4096 - 1)) == 0);
195f568604bSVikram Kanigiri 
196f568604bSVikram Kanigiri 	for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
197f568604bSVikram Kanigiri 		assert(DMC_INST_BASE_ADDR(dmc_inst));
198f568604bSVikram Kanigiri 		for (sys_if = 0; sys_if < MAX_SYS_IF_COUNT; sys_if++)
199f568604bSVikram Kanigiri 			_tzc_dmc500_configure_region(
200f568604bSVikram Kanigiri 					DMC_INST_SI_BASE(dmc_inst, sys_if),
201f568604bSVikram Kanigiri 					TZC_DMC500_REGION_ATTR_F_EN_MASK,
202f568604bSVikram Kanigiri 					region_no, region_base, region_top,
203f568604bSVikram Kanigiri 					sec_attr, nsaid_permissions);
204f568604bSVikram Kanigiri 	}
205f568604bSVikram Kanigiri 
206f568604bSVikram Kanigiri 	g_conf_regions[region_no].sec_attr = sec_attr;
207f568604bSVikram Kanigiri 	g_conf_regions[region_no].is_enabled = 1;
208f568604bSVikram Kanigiri }
209f568604bSVikram Kanigiri 
210f568604bSVikram Kanigiri /* Sets the action value for all the DMC instances */
211f568604bSVikram Kanigiri void tzc_dmc500_set_action(tzc_action_t action)
212f568604bSVikram Kanigiri {
213f568604bSVikram Kanigiri 	int dmc_inst;
214f568604bSVikram Kanigiri 
215f568604bSVikram Kanigiri 	assert(g_driver_data);
216f568604bSVikram Kanigiri 
217f568604bSVikram Kanigiri 	for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
218f568604bSVikram Kanigiri 		assert(DMC_INST_BASE_ADDR(dmc_inst));
219f568604bSVikram Kanigiri 		/*
220f568604bSVikram Kanigiri 		 * - Currently no handler is provided to trap an error via
221f568604bSVikram Kanigiri 		 *   interrupt or exception.
222f568604bSVikram Kanigiri 		 * - The interrupt action has not been tested.
223f568604bSVikram Kanigiri 		 */
224f568604bSVikram Kanigiri 		_tzc_dmc500_write_action(DMC_INST_BASE_ADDR(dmc_inst), action);
225f568604bSVikram Kanigiri 	}
226f568604bSVikram Kanigiri }
227f568604bSVikram Kanigiri 
228f568604bSVikram Kanigiri /*
229f568604bSVikram Kanigiri  * A DMC-500 instance must be present at each base address provided by the
230f568604bSVikram Kanigiri  * platform. It also expects platform to pass at least one instance of
231f568604bSVikram Kanigiri  * DMC-500.
232f568604bSVikram Kanigiri  */
233f568604bSVikram Kanigiri static void validate_plat_driver_data(
234f568604bSVikram Kanigiri 			const tzc_dmc500_driver_data_t *plat_driver_data)
235f568604bSVikram Kanigiri {
236aa61368eSAntonio Nino Diaz #if ENABLE_ASSERTIONS
237f568604bSVikram Kanigiri 	int i;
238f568604bSVikram Kanigiri 	unsigned int dmc_id;
239f568604bSVikram Kanigiri 	uintptr_t dmc_base;
240f568604bSVikram Kanigiri 
241f568604bSVikram Kanigiri 	assert(plat_driver_data);
242f568604bSVikram Kanigiri 	assert(plat_driver_data->dmc_count > 0 &&
243f568604bSVikram Kanigiri 		(plat_driver_data->dmc_count <= MAX_DMC_COUNT));
244f568604bSVikram Kanigiri 
245f568604bSVikram Kanigiri 	for (i = 0; i < plat_driver_data->dmc_count; i++) {
246f568604bSVikram Kanigiri 		dmc_base = plat_driver_data->dmc_base[i];
247f568604bSVikram Kanigiri 		assert(dmc_base);
248f568604bSVikram Kanigiri 
249f568604bSVikram Kanigiri 		dmc_id = _tzc_read_peripheral_id(dmc_base);
250f568604bSVikram Kanigiri 		assert(dmc_id == DMC500_PERIPHERAL_ID);
251f568604bSVikram Kanigiri 	}
252aa61368eSAntonio Nino Diaz #endif /* ENABLE_ASSERTIONS */
253f568604bSVikram Kanigiri }
254f568604bSVikram Kanigiri 
255f568604bSVikram Kanigiri 
256f568604bSVikram Kanigiri /*
257f568604bSVikram Kanigiri  * Initializes the base address and count of DMC instances.
258f568604bSVikram Kanigiri  *
259f568604bSVikram Kanigiri  * Note : Only pointer to plat_driver_data is saved, so it is caller's
260f568604bSVikram Kanigiri  * responsibility to keep it valid until the driver is used.
261f568604bSVikram Kanigiri  */
262f568604bSVikram Kanigiri void tzc_dmc500_driver_init(const tzc_dmc500_driver_data_t *plat_driver_data)
263f568604bSVikram Kanigiri {
264f568604bSVikram Kanigiri 	/* Check valid pointer is passed */
265f568604bSVikram Kanigiri 	assert(plat_driver_data);
266f568604bSVikram Kanigiri 
267f568604bSVikram Kanigiri 	/*
268f568604bSVikram Kanigiri 	 * NOTE: This driver expects the DMC-500 controller is already in
269f568604bSVikram Kanigiri 	 * READY state. Hence, it uses the reconfiguration method for
270f568604bSVikram Kanigiri 	 * programming TrustZone regions
271f568604bSVikram Kanigiri 	 */
272f568604bSVikram Kanigiri 	/* Validates the information passed by platform */
273f568604bSVikram Kanigiri 	validate_plat_driver_data(plat_driver_data);
274f568604bSVikram Kanigiri 	g_driver_data = plat_driver_data;
275f568604bSVikram Kanigiri }
276