1f568604bSVikram Kanigiri /*
2af6491f8SAntonio Nino Diaz * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
3f568604bSVikram Kanigiri *
482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause
5f568604bSVikram Kanigiri */
6f568604bSVikram Kanigiri
7f568604bSVikram Kanigiri #include <assert.h>
8*09d40e0eSAntonio Nino Diaz
9*09d40e0eSAntonio Nino Diaz #include <common/debug.h>
10*09d40e0eSAntonio Nino Diaz #include <drivers/arm/tzc_dmc500.h>
11*09d40e0eSAntonio Nino Diaz #include <drivers/arm/tzc_common.h>
12*09d40e0eSAntonio Nino Diaz #include <lib/mmio.h>
13*09d40e0eSAntonio Nino Diaz
14239b085cSAntonio Nino Diaz #include "tzc_common_private.h"
15f568604bSVikram Kanigiri
16f568604bSVikram Kanigiri /*
17f568604bSVikram Kanigiri * Macros which will be used by common core functions.
18f568604bSVikram Kanigiri */
19f568604bSVikram Kanigiri #define TZC_DMC500_REGION_BASE_LOW_0_OFFSET 0x054
20f568604bSVikram Kanigiri #define TZC_DMC500_REGION_BASE_HIGH_0_OFFSET 0x058
21f568604bSVikram Kanigiri #define TZC_DMC500_REGION_TOP_LOW_0_OFFSET 0x05C
22f568604bSVikram Kanigiri #define TZC_DMC500_REGION_TOP_HIGH_0_OFFSET 0x060
23f568604bSVikram Kanigiri #define TZC_DMC500_REGION_ATTR_0_OFFSET 0x064
24f568604bSVikram Kanigiri #define TZC_DMC500_REGION_ID_ACCESS_0_OFFSET 0x068
25f568604bSVikram Kanigiri
26f568604bSVikram Kanigiri #define TZC_DMC500_ACTION_OFF 0x50
27f568604bSVikram Kanigiri
28f568604bSVikram Kanigiri /* Pointer to the tzc_dmc500_driver_data structure populated by the platform */
29f568604bSVikram Kanigiri static const tzc_dmc500_driver_data_t *g_driver_data;
30d12afc8eSAmit Daniel Kachhap static unsigned int g_sys_if_count;
31f568604bSVikram Kanigiri
32f568604bSVikram Kanigiri #define verify_region_attr(region, attr) \
33f568604bSVikram Kanigiri ((g_conf_regions[(region)].sec_attr == \
34f568604bSVikram Kanigiri ((attr) >> TZC_REGION_ATTR_SEC_SHIFT)) \
35f568604bSVikram Kanigiri && ((attr) & (0x1 << TZC_REGION_ATTR_F_EN_SHIFT)))
36f568604bSVikram Kanigiri
37f568604bSVikram Kanigiri /*
38f568604bSVikram Kanigiri * Structure for configured regions attributes in DMC500.
39f568604bSVikram Kanigiri */
40f568604bSVikram Kanigiri typedef struct tzc_dmc500_regions {
41af6491f8SAntonio Nino Diaz unsigned int sec_attr;
42f568604bSVikram Kanigiri int is_enabled;
43f568604bSVikram Kanigiri } tzc_dmc500_regions_t;
44f568604bSVikram Kanigiri
45f568604bSVikram Kanigiri /*
46f568604bSVikram Kanigiri * Array storing the attributes of the configured regions. This array
47f568604bSVikram Kanigiri * will be used by the `tzc_dmc500_verify_complete` to verify the flush
48f568604bSVikram Kanigiri * completion.
49f568604bSVikram Kanigiri */
50f568604bSVikram Kanigiri static tzc_dmc500_regions_t g_conf_regions[MAX_REGION_VAL + 1];
51f568604bSVikram Kanigiri
52f568604bSVikram Kanigiri /* Helper Macros for making the code readable */
53f568604bSVikram Kanigiri #define DMC_INST_BASE_ADDR(instance) (g_driver_data->dmc_base[instance])
54f568604bSVikram Kanigiri #define DMC_INST_SI_BASE(instance, interface) \
55f568604bSVikram Kanigiri (DMC_INST_BASE_ADDR(instance) + IFACE_OFFSET(interface))
56f568604bSVikram Kanigiri
DEFINE_TZC_COMMON_WRITE_ACTION(_dmc500,DMC500)57f568604bSVikram Kanigiri DEFINE_TZC_COMMON_WRITE_ACTION(_dmc500, DMC500)
58f568604bSVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_BASE(_dmc500, DMC500)
59f568604bSVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_TOP(_dmc500, DMC500)
60f568604bSVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_ATTRIBUTES(_dmc500, DMC500)
61f568604bSVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_ID_ACCESS(_dmc500, DMC500)
62f568604bSVikram Kanigiri
63f568604bSVikram Kanigiri DEFINE_TZC_COMMON_CONFIGURE_REGION0(_dmc500)
64f568604bSVikram Kanigiri DEFINE_TZC_COMMON_CONFIGURE_REGION(_dmc500)
65f568604bSVikram Kanigiri
66f568604bSVikram Kanigiri static inline unsigned int _tzc_dmc500_read_region_attr_0(
67f568604bSVikram Kanigiri uintptr_t dmc_si_base,
68af6491f8SAntonio Nino Diaz unsigned int region_no)
69f568604bSVikram Kanigiri {
70f568604bSVikram Kanigiri return mmio_read_32(dmc_si_base +
71f568604bSVikram Kanigiri TZC_REGION_OFFSET(TZC_DMC500_REGION_SIZE, region_no) +
72f568604bSVikram Kanigiri TZC_DMC500_REGION_ATTR_0_OFFSET);
73f568604bSVikram Kanigiri }
74f568604bSVikram Kanigiri
_tzc_dmc500_write_flush_control(uintptr_t dmc_si_base)75f568604bSVikram Kanigiri static inline void _tzc_dmc500_write_flush_control(uintptr_t dmc_si_base)
76f568604bSVikram Kanigiri {
77f568604bSVikram Kanigiri mmio_write_32(dmc_si_base + SI_FLUSH_CTRL_OFFSET, 1);
78f568604bSVikram Kanigiri }
79f568604bSVikram Kanigiri
80f568604bSVikram Kanigiri /*
81f568604bSVikram Kanigiri * Sets the Flush controls for all the DMC Instances and System Interfaces.
82f568604bSVikram Kanigiri * This initiates the flush of configuration settings from the shadow
83f568604bSVikram Kanigiri * registers to the actual configuration register. The caller should poll
84f568604bSVikram Kanigiri * changed register to confirm update.
85f568604bSVikram Kanigiri */
tzc_dmc500_config_complete(void)86f568604bSVikram Kanigiri void tzc_dmc500_config_complete(void)
87f568604bSVikram Kanigiri {
88f568604bSVikram Kanigiri int dmc_inst, sys_if;
89f568604bSVikram Kanigiri
90f568604bSVikram Kanigiri assert(g_driver_data);
91f568604bSVikram Kanigiri
92f568604bSVikram Kanigiri for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
93f568604bSVikram Kanigiri assert(DMC_INST_BASE_ADDR(dmc_inst));
94d12afc8eSAmit Daniel Kachhap for (sys_if = 0; sys_if < g_sys_if_count; sys_if++)
95f568604bSVikram Kanigiri _tzc_dmc500_write_flush_control(
96f568604bSVikram Kanigiri DMC_INST_SI_BASE(dmc_inst, sys_if));
97f568604bSVikram Kanigiri }
98f568604bSVikram Kanigiri }
99f568604bSVikram Kanigiri
100f568604bSVikram Kanigiri /*
101f568604bSVikram Kanigiri * This function reads back the secure attributes from the configuration
102f568604bSVikram Kanigiri * register for each DMC Instance and System Interface and compares it with
103f568604bSVikram Kanigiri * the configured value. The successful verification of the region attributes
104f568604bSVikram Kanigiri * confirms that the flush operation has completed.
105f568604bSVikram Kanigiri * If the verification fails, the caller is expected to invoke this API again
106f568604bSVikram Kanigiri * till it succeeds.
107f568604bSVikram Kanigiri * Returns 0 on success and 1 on failure.
108f568604bSVikram Kanigiri */
tzc_dmc500_verify_complete(void)109f568604bSVikram Kanigiri int tzc_dmc500_verify_complete(void)
110f568604bSVikram Kanigiri {
111f568604bSVikram Kanigiri int dmc_inst, sys_if, region_no;
112f568604bSVikram Kanigiri unsigned int attr;
113f568604bSVikram Kanigiri
114f568604bSVikram Kanigiri assert(g_driver_data);
115f568604bSVikram Kanigiri /* Region 0 must be configured */
116f568604bSVikram Kanigiri assert(g_conf_regions[0].is_enabled);
117f568604bSVikram Kanigiri
118f568604bSVikram Kanigiri /* Iterate over all configured regions */
119f568604bSVikram Kanigiri for (region_no = 0; region_no <= MAX_REGION_VAL; region_no++) {
120f568604bSVikram Kanigiri if (!g_conf_regions[region_no].is_enabled)
121f568604bSVikram Kanigiri continue;
122f568604bSVikram Kanigiri for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count;
123f568604bSVikram Kanigiri dmc_inst++) {
124f568604bSVikram Kanigiri assert(DMC_INST_BASE_ADDR(dmc_inst));
125d12afc8eSAmit Daniel Kachhap for (sys_if = 0; sys_if < g_sys_if_count;
126f568604bSVikram Kanigiri sys_if++) {
127f568604bSVikram Kanigiri attr = _tzc_dmc500_read_region_attr_0(
128f568604bSVikram Kanigiri DMC_INST_SI_BASE(dmc_inst, sys_if),
129f568604bSVikram Kanigiri region_no);
130f568604bSVikram Kanigiri VERBOSE("Verifying DMC500 region:%d"
131f568604bSVikram Kanigiri " dmc_inst:%d sys_if:%d attr:%x\n",
132f568604bSVikram Kanigiri region_no, dmc_inst, sys_if, attr);
133f568604bSVikram Kanigiri if (!verify_region_attr(region_no, attr))
134f568604bSVikram Kanigiri return 1;
135f568604bSVikram Kanigiri }
136f568604bSVikram Kanigiri }
137f568604bSVikram Kanigiri }
138f568604bSVikram Kanigiri
139f568604bSVikram Kanigiri return 0;
140f568604bSVikram Kanigiri }
141f568604bSVikram Kanigiri
142f568604bSVikram Kanigiri /*
143f568604bSVikram Kanigiri * `tzc_dmc500_configure_region0` is used to program region 0 in both the
144f568604bSVikram Kanigiri * system interfaces of all the DMC-500 instances. Region 0 covers the whole
145f568604bSVikram Kanigiri * address space that is not mapped to any other region for a system interface,
146f568604bSVikram Kanigiri * and is always enabled; this cannot be changed. This function only changes
147f568604bSVikram Kanigiri * the access permissions.
148f568604bSVikram Kanigiri */
tzc_dmc500_configure_region0(unsigned int sec_attr,unsigned int nsaid_permissions)149af6491f8SAntonio Nino Diaz void tzc_dmc500_configure_region0(unsigned int sec_attr,
150f568604bSVikram Kanigiri unsigned int nsaid_permissions)
151f568604bSVikram Kanigiri {
152f568604bSVikram Kanigiri int dmc_inst, sys_if;
153f568604bSVikram Kanigiri
154f568604bSVikram Kanigiri /* Assert if DMC-500 is not initialized */
155f568604bSVikram Kanigiri assert(g_driver_data);
156f568604bSVikram Kanigiri
157f568604bSVikram Kanigiri /* Configure region_0 in all DMC instances */
158f568604bSVikram Kanigiri for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
159f568604bSVikram Kanigiri assert(DMC_INST_BASE_ADDR(dmc_inst));
160d12afc8eSAmit Daniel Kachhap for (sys_if = 0; sys_if < g_sys_if_count; sys_if++)
161f568604bSVikram Kanigiri _tzc_dmc500_configure_region0(
162f568604bSVikram Kanigiri DMC_INST_SI_BASE(dmc_inst, sys_if),
163f568604bSVikram Kanigiri sec_attr, nsaid_permissions);
164f568604bSVikram Kanigiri }
165f568604bSVikram Kanigiri
166f568604bSVikram Kanigiri g_conf_regions[0].sec_attr = sec_attr;
167f568604bSVikram Kanigiri g_conf_regions[0].is_enabled = 1;
168f568604bSVikram Kanigiri }
169f568604bSVikram Kanigiri
170f568604bSVikram Kanigiri /*
171f568604bSVikram Kanigiri * `tzc_dmc500_configure_region` is used to program a region into all system
172f568604bSVikram Kanigiri * interfaces of all the DMC instances.
173f568604bSVikram Kanigiri * NOTE:
174f568604bSVikram Kanigiri * Region 0 is special; it is preferable to use tzc_dmc500_configure_region0
175f568604bSVikram Kanigiri * for this region (see comment for that function).
176f568604bSVikram Kanigiri */
tzc_dmc500_configure_region(unsigned int region_no,unsigned long long region_base,unsigned long long region_top,unsigned int sec_attr,unsigned int nsaid_permissions)177af6491f8SAntonio Nino Diaz void tzc_dmc500_configure_region(unsigned int region_no,
1789fbdb802SYatharth Kochar unsigned long long region_base,
1799fbdb802SYatharth Kochar unsigned long long region_top,
180af6491f8SAntonio Nino Diaz unsigned int sec_attr,
181f568604bSVikram Kanigiri unsigned int nsaid_permissions)
182f568604bSVikram Kanigiri {
183f568604bSVikram Kanigiri int dmc_inst, sys_if;
184f568604bSVikram Kanigiri
185f568604bSVikram Kanigiri assert(g_driver_data);
186f568604bSVikram Kanigiri /* Do range checks on regions. */
187af6491f8SAntonio Nino Diaz assert((region_no >= 0U) && (region_no <= MAX_REGION_VAL));
188f568604bSVikram Kanigiri
189f568604bSVikram Kanigiri /*
190f568604bSVikram Kanigiri * Do address range check based on DMC-TZ configuration. A 43bit address
191f568604bSVikram Kanigiri * is the max and expected case.
192f568604bSVikram Kanigiri */
193b56ec680SSandrine Bailleux assert(((region_top <= (UINT64_MAX >> (64U - 43U))) &&
194f568604bSVikram Kanigiri (region_base < region_top)));
195f568604bSVikram Kanigiri
196f568604bSVikram Kanigiri /* region_base and (region_top + 1) must be 4KB aligned */
197af6491f8SAntonio Nino Diaz assert(((region_base | (region_top + 1U)) & (4096U - 1U)) == 0U);
198f568604bSVikram Kanigiri
199f568604bSVikram Kanigiri for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
200f568604bSVikram Kanigiri assert(DMC_INST_BASE_ADDR(dmc_inst));
201d12afc8eSAmit Daniel Kachhap for (sys_if = 0; sys_if < g_sys_if_count; sys_if++)
202f568604bSVikram Kanigiri _tzc_dmc500_configure_region(
203f568604bSVikram Kanigiri DMC_INST_SI_BASE(dmc_inst, sys_if),
204f568604bSVikram Kanigiri TZC_DMC500_REGION_ATTR_F_EN_MASK,
205f568604bSVikram Kanigiri region_no, region_base, region_top,
206f568604bSVikram Kanigiri sec_attr, nsaid_permissions);
207f568604bSVikram Kanigiri }
208f568604bSVikram Kanigiri
209f568604bSVikram Kanigiri g_conf_regions[region_no].sec_attr = sec_attr;
210f568604bSVikram Kanigiri g_conf_regions[region_no].is_enabled = 1;
211f568604bSVikram Kanigiri }
212f568604bSVikram Kanigiri
213f568604bSVikram Kanigiri /* Sets the action value for all the DMC instances */
tzc_dmc500_set_action(unsigned int action)214af6491f8SAntonio Nino Diaz void tzc_dmc500_set_action(unsigned int action)
215f568604bSVikram Kanigiri {
216f568604bSVikram Kanigiri int dmc_inst;
217f568604bSVikram Kanigiri
218f568604bSVikram Kanigiri assert(g_driver_data);
219f568604bSVikram Kanigiri
220f568604bSVikram Kanigiri for (dmc_inst = 0; dmc_inst < g_driver_data->dmc_count; dmc_inst++) {
221f568604bSVikram Kanigiri assert(DMC_INST_BASE_ADDR(dmc_inst));
222f568604bSVikram Kanigiri /*
223f568604bSVikram Kanigiri * - Currently no handler is provided to trap an error via
224f568604bSVikram Kanigiri * interrupt or exception.
225f568604bSVikram Kanigiri * - The interrupt action has not been tested.
226f568604bSVikram Kanigiri */
227f568604bSVikram Kanigiri _tzc_dmc500_write_action(DMC_INST_BASE_ADDR(dmc_inst), action);
228f568604bSVikram Kanigiri }
229f568604bSVikram Kanigiri }
230f568604bSVikram Kanigiri
231f568604bSVikram Kanigiri /*
232f568604bSVikram Kanigiri * A DMC-500 instance must be present at each base address provided by the
233f568604bSVikram Kanigiri * platform. It also expects platform to pass at least one instance of
234f568604bSVikram Kanigiri * DMC-500.
235f568604bSVikram Kanigiri */
validate_plat_driver_data(const tzc_dmc500_driver_data_t * plat_driver_data)236f568604bSVikram Kanigiri static void validate_plat_driver_data(
237f568604bSVikram Kanigiri const tzc_dmc500_driver_data_t *plat_driver_data)
238f568604bSVikram Kanigiri {
239aa61368eSAntonio Nino Diaz #if ENABLE_ASSERTIONS
240f568604bSVikram Kanigiri int i;
241f568604bSVikram Kanigiri unsigned int dmc_id;
242f568604bSVikram Kanigiri uintptr_t dmc_base;
243f568604bSVikram Kanigiri
244f568604bSVikram Kanigiri assert(plat_driver_data);
245f568604bSVikram Kanigiri assert(plat_driver_data->dmc_count > 0 &&
246f568604bSVikram Kanigiri (plat_driver_data->dmc_count <= MAX_DMC_COUNT));
247f568604bSVikram Kanigiri
248f568604bSVikram Kanigiri for (i = 0; i < plat_driver_data->dmc_count; i++) {
249f568604bSVikram Kanigiri dmc_base = plat_driver_data->dmc_base[i];
250f568604bSVikram Kanigiri assert(dmc_base);
251f568604bSVikram Kanigiri
252f568604bSVikram Kanigiri dmc_id = _tzc_read_peripheral_id(dmc_base);
253f568604bSVikram Kanigiri assert(dmc_id == DMC500_PERIPHERAL_ID);
254f568604bSVikram Kanigiri }
255aa61368eSAntonio Nino Diaz #endif /* ENABLE_ASSERTIONS */
256f568604bSVikram Kanigiri }
257f568604bSVikram Kanigiri
258f568604bSVikram Kanigiri
259f568604bSVikram Kanigiri /*
260f568604bSVikram Kanigiri * Initializes the base address and count of DMC instances.
261f568604bSVikram Kanigiri *
262f568604bSVikram Kanigiri * Note : Only pointer to plat_driver_data is saved, so it is caller's
263f568604bSVikram Kanigiri * responsibility to keep it valid until the driver is used.
264f568604bSVikram Kanigiri */
tzc_dmc500_driver_init(const tzc_dmc500_driver_data_t * plat_driver_data)265f568604bSVikram Kanigiri void tzc_dmc500_driver_init(const tzc_dmc500_driver_data_t *plat_driver_data)
266f568604bSVikram Kanigiri {
267f568604bSVikram Kanigiri /* Check valid pointer is passed */
268f568604bSVikram Kanigiri assert(plat_driver_data);
269f568604bSVikram Kanigiri
270f568604bSVikram Kanigiri /*
271f568604bSVikram Kanigiri * NOTE: This driver expects the DMC-500 controller is already in
272f568604bSVikram Kanigiri * READY state. Hence, it uses the reconfiguration method for
273f568604bSVikram Kanigiri * programming TrustZone regions
274f568604bSVikram Kanigiri */
275f568604bSVikram Kanigiri /* Validates the information passed by platform */
276f568604bSVikram Kanigiri validate_plat_driver_data(plat_driver_data);
277f568604bSVikram Kanigiri g_driver_data = plat_driver_data;
278d12afc8eSAmit Daniel Kachhap
279d12afc8eSAmit Daniel Kachhap /* Check valid system interface count */
280d12afc8eSAmit Daniel Kachhap assert(g_driver_data->sys_if_count <= MAX_SYS_IF_COUNT);
281d12afc8eSAmit Daniel Kachhap
282d12afc8eSAmit Daniel Kachhap g_sys_if_count = g_driver_data->sys_if_count;
283d12afc8eSAmit Daniel Kachhap
284d12afc8eSAmit Daniel Kachhap /* If interface count is not present then assume max */
285d12afc8eSAmit Daniel Kachhap if (g_sys_if_count == 0U)
286d12afc8eSAmit Daniel Kachhap g_sys_if_count = MAX_SYS_IF_COUNT;
287f568604bSVikram Kanigiri }
288