xref: /rk3399_ARM-atf/drivers/arm/tzc/tzc400.c (revision 34c1a1a43c2d238bc756e6ce618ec8bb9169bf2d)
16b477063SVikram Kanigiri /*
2d4c61c38SHeyi Guo  * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
36b477063SVikram Kanigiri  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
56b477063SVikram Kanigiri  */
66b477063SVikram Kanigiri 
76b477063SVikram Kanigiri #include <assert.h>
86b477063SVikram Kanigiri #include <stddef.h>
909d40e0eSAntonio Nino Diaz 
1009d40e0eSAntonio Nino Diaz #include <common/debug.h>
1109d40e0eSAntonio Nino Diaz #include <drivers/arm/tzc400.h>
1209d40e0eSAntonio Nino Diaz #include <lib/mmio.h>
13*34c1a1a4SYann Gautier #include <lib/utils_def.h>
1409d40e0eSAntonio Nino Diaz 
15239b085cSAntonio Nino Diaz #include "tzc_common_private.h"
166b477063SVikram Kanigiri 
176b477063SVikram Kanigiri /*
186b477063SVikram Kanigiri  * Macros which will be used by common core functions.
196b477063SVikram Kanigiri  */
20af6491f8SAntonio Nino Diaz #define TZC_400_REGION_BASE_LOW_0_OFFSET	U(0x100)
21af6491f8SAntonio Nino Diaz #define TZC_400_REGION_BASE_HIGH_0_OFFSET	U(0x104)
22af6491f8SAntonio Nino Diaz #define TZC_400_REGION_TOP_LOW_0_OFFSET		U(0x108)
23af6491f8SAntonio Nino Diaz #define TZC_400_REGION_TOP_HIGH_0_OFFSET	U(0x10c)
24af6491f8SAntonio Nino Diaz #define TZC_400_REGION_ATTR_0_OFFSET		U(0x110)
25af6491f8SAntonio Nino Diaz #define TZC_400_REGION_ID_ACCESS_0_OFFSET	U(0x114)
266b477063SVikram Kanigiri 
276b477063SVikram Kanigiri /*
286b477063SVikram Kanigiri  * Implementation defined values used to validate inputs later.
296b477063SVikram Kanigiri  * Filters : max of 4 ; 0 to 3
306b477063SVikram Kanigiri  * Regions : max of 9 ; 0 to 8
316b477063SVikram Kanigiri  * Address width : Values between 32 to 64
326b477063SVikram Kanigiri  */
336b477063SVikram Kanigiri typedef struct tzc400_instance {
346b477063SVikram Kanigiri 	uintptr_t base;
356b477063SVikram Kanigiri 	uint8_t addr_width;
366b477063SVikram Kanigiri 	uint8_t num_filters;
376b477063SVikram Kanigiri 	uint8_t num_regions;
386b477063SVikram Kanigiri } tzc400_instance_t;
396b477063SVikram Kanigiri 
401af540efSRoberto Vargas static tzc400_instance_t tzc400;
416b477063SVikram Kanigiri 
426b477063SVikram Kanigiri static inline unsigned int _tzc400_read_build_config(uintptr_t base)
436b477063SVikram Kanigiri {
446b477063SVikram Kanigiri 	return mmio_read_32(base + BUILD_CONFIG_OFF);
456b477063SVikram Kanigiri }
466b477063SVikram Kanigiri 
476b477063SVikram Kanigiri static inline unsigned int _tzc400_read_gate_keeper(uintptr_t base)
486b477063SVikram Kanigiri {
496b477063SVikram Kanigiri 	return mmio_read_32(base + GATE_KEEPER_OFF);
506b477063SVikram Kanigiri }
516b477063SVikram Kanigiri 
526b477063SVikram Kanigiri static inline void _tzc400_write_gate_keeper(uintptr_t base, unsigned int val)
536b477063SVikram Kanigiri {
546b477063SVikram Kanigiri 	mmio_write_32(base + GATE_KEEPER_OFF, val);
556b477063SVikram Kanigiri }
566b477063SVikram Kanigiri 
576b477063SVikram Kanigiri /*
586b477063SVikram Kanigiri  * Get the open status information for all filter units.
596b477063SVikram Kanigiri  */
60896a5902SDaniel Boulby #define get_gate_keeper_os(_base)	((_tzc400_read_gate_keeper(_base) >>  \
616b477063SVikram Kanigiri 					GATE_KEEPER_OS_SHIFT) &		\
626b477063SVikram Kanigiri 					GATE_KEEPER_OS_MASK)
636b477063SVikram Kanigiri 
646b477063SVikram Kanigiri 
656b477063SVikram Kanigiri /* Define common core functions used across different TZC peripherals. */
666b477063SVikram Kanigiri DEFINE_TZC_COMMON_WRITE_ACTION(400, 400)
676b477063SVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_BASE(400, 400)
686b477063SVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_TOP(400, 400)
696b477063SVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_ATTRIBUTES(400, 400)
706b477063SVikram Kanigiri DEFINE_TZC_COMMON_WRITE_REGION_ID_ACCESS(400, 400)
716b477063SVikram Kanigiri DEFINE_TZC_COMMON_CONFIGURE_REGION0(400)
726b477063SVikram Kanigiri DEFINE_TZC_COMMON_CONFIGURE_REGION(400)
736b477063SVikram Kanigiri 
74*34c1a1a4SYann Gautier static void _tzc400_clear_it(uintptr_t base, uint32_t filter)
75*34c1a1a4SYann Gautier {
76*34c1a1a4SYann Gautier 	mmio_write_32(base + INT_CLEAR, BIT_32(filter));
77*34c1a1a4SYann Gautier }
78*34c1a1a4SYann Gautier 
79*34c1a1a4SYann Gautier static uint32_t _tzc400_get_int_by_filter(uintptr_t base, uint32_t filter)
80*34c1a1a4SYann Gautier {
81*34c1a1a4SYann Gautier 	return mmio_read_32(base + INT_STATUS) & BIT_32(filter);
82*34c1a1a4SYann Gautier }
83*34c1a1a4SYann Gautier 
84*34c1a1a4SYann Gautier #if DEBUG
85*34c1a1a4SYann Gautier static unsigned long _tzc400_get_fail_address(uintptr_t base, uint32_t filter)
86*34c1a1a4SYann Gautier {
87*34c1a1a4SYann Gautier 	unsigned long fail_address;
88*34c1a1a4SYann Gautier 
89*34c1a1a4SYann Gautier 	fail_address = mmio_read_32(base + FAIL_ADDRESS_LOW_OFF +
90*34c1a1a4SYann Gautier 				    (filter * FILTER_OFFSET));
91*34c1a1a4SYann Gautier #ifdef __aarch64__
92*34c1a1a4SYann Gautier 	fail_address += (unsigned long)mmio_read_32(base + FAIL_ADDRESS_HIGH_OFF +
93*34c1a1a4SYann Gautier 						    (filter * FILTER_OFFSET)) << 32;
94*34c1a1a4SYann Gautier #endif
95*34c1a1a4SYann Gautier 
96*34c1a1a4SYann Gautier 	return fail_address;
97*34c1a1a4SYann Gautier }
98*34c1a1a4SYann Gautier 
99*34c1a1a4SYann Gautier static uint32_t _tzc400_get_fail_id(uintptr_t base, uint32_t filter)
100*34c1a1a4SYann Gautier {
101*34c1a1a4SYann Gautier 	return mmio_read_32(base + FAIL_ID + (filter * FILTER_OFFSET));
102*34c1a1a4SYann Gautier }
103*34c1a1a4SYann Gautier 
104*34c1a1a4SYann Gautier static uint32_t _tzc400_get_fail_control(uintptr_t base, uint32_t filter)
105*34c1a1a4SYann Gautier {
106*34c1a1a4SYann Gautier 	return mmio_read_32(base + FAIL_CONTROL_OFF + (filter * FILTER_OFFSET));
107*34c1a1a4SYann Gautier }
108*34c1a1a4SYann Gautier 
109*34c1a1a4SYann Gautier static void _tzc400_dump_fail_filter(uintptr_t base, uint32_t filter)
110*34c1a1a4SYann Gautier {
111*34c1a1a4SYann Gautier 	uint32_t control_fail;
112*34c1a1a4SYann Gautier 	uint32_t fail_id;
113*34c1a1a4SYann Gautier 	unsigned long address_fail;
114*34c1a1a4SYann Gautier 
115*34c1a1a4SYann Gautier 	address_fail = _tzc400_get_fail_address(base, filter);
116*34c1a1a4SYann Gautier 	ERROR("Illegal access to 0x%lx:\n", address_fail);
117*34c1a1a4SYann Gautier 
118*34c1a1a4SYann Gautier 	fail_id = _tzc400_get_fail_id(base, filter);
119*34c1a1a4SYann Gautier 	ERROR("\tFAIL_ID = 0x%x\n", fail_id);
120*34c1a1a4SYann Gautier 
121*34c1a1a4SYann Gautier 	control_fail = _tzc400_get_fail_control(base, filter);
122*34c1a1a4SYann Gautier 	if (((control_fail & BIT_32(FAIL_CONTROL_NS_SHIFT)) >> FAIL_CONTROL_NS_SHIFT) ==
123*34c1a1a4SYann Gautier 	    FAIL_CONTROL_NS_NONSECURE) {
124*34c1a1a4SYann Gautier 		ERROR("\tNon-Secure\n");
125*34c1a1a4SYann Gautier 	} else {
126*34c1a1a4SYann Gautier 		ERROR("\tSecure\n");
127*34c1a1a4SYann Gautier 	}
128*34c1a1a4SYann Gautier 
129*34c1a1a4SYann Gautier 	if (((control_fail & BIT_32(FAIL_CONTROL_PRIV_SHIFT)) >> FAIL_CONTROL_PRIV_SHIFT) ==
130*34c1a1a4SYann Gautier 	    FAIL_CONTROL_PRIV_PRIV) {
131*34c1a1a4SYann Gautier 		ERROR("\tPrivilege\n");
132*34c1a1a4SYann Gautier 	} else {
133*34c1a1a4SYann Gautier 		ERROR("\tUnprivilege\n");
134*34c1a1a4SYann Gautier 	}
135*34c1a1a4SYann Gautier 
136*34c1a1a4SYann Gautier 	if (((control_fail & BIT_32(FAIL_CONTROL_DIR_SHIFT)) >> FAIL_CONTROL_DIR_SHIFT) ==
137*34c1a1a4SYann Gautier 	    FAIL_CONTROL_DIR_WRITE) {
138*34c1a1a4SYann Gautier 		ERROR("\tWrite\n");
139*34c1a1a4SYann Gautier 	} else {
140*34c1a1a4SYann Gautier 		ERROR("\tRead\n");
141*34c1a1a4SYann Gautier 	}
142*34c1a1a4SYann Gautier }
143*34c1a1a4SYann Gautier #endif /* DEBUG */
144*34c1a1a4SYann Gautier 
1456b477063SVikram Kanigiri static unsigned int _tzc400_get_gate_keeper(uintptr_t base,
1466b477063SVikram Kanigiri 				unsigned int filter)
1476b477063SVikram Kanigiri {
1486b477063SVikram Kanigiri 	unsigned int open_status;
1496b477063SVikram Kanigiri 
1506b477063SVikram Kanigiri 	open_status = get_gate_keeper_os(base);
1516b477063SVikram Kanigiri 
1526b477063SVikram Kanigiri 	return (open_status >> filter) & GATE_KEEPER_FILTER_MASK;
1536b477063SVikram Kanigiri }
1546b477063SVikram Kanigiri 
1556b477063SVikram Kanigiri /* This function is not MP safe. */
1566b477063SVikram Kanigiri static void _tzc400_set_gate_keeper(uintptr_t base,
1576b477063SVikram Kanigiri 				unsigned int filter,
1586b477063SVikram Kanigiri 				int val)
1596b477063SVikram Kanigiri {
1606b477063SVikram Kanigiri 	unsigned int open_status;
1616b477063SVikram Kanigiri 
1626b477063SVikram Kanigiri 	/* Upper half is current state. Lower half is requested state. */
1636b477063SVikram Kanigiri 	open_status = get_gate_keeper_os(base);
1646b477063SVikram Kanigiri 
165af6491f8SAntonio Nino Diaz 	if (val != 0)
166d7b5f408SJimmy Brisson 		open_status |=  (1UL << filter);
1676b477063SVikram Kanigiri 	else
168d7b5f408SJimmy Brisson 		open_status &= ~(1UL << filter);
1696b477063SVikram Kanigiri 
1706b477063SVikram Kanigiri 	_tzc400_write_gate_keeper(base, (open_status & GATE_KEEPER_OR_MASK) <<
1716b477063SVikram Kanigiri 			      GATE_KEEPER_OR_SHIFT);
1726b477063SVikram Kanigiri 
1736b477063SVikram Kanigiri 	/* Wait here until we see the change reflected in the TZC status. */
1746b477063SVikram Kanigiri 	while ((get_gate_keeper_os(base)) != open_status)
1756b477063SVikram Kanigiri 		;
1766b477063SVikram Kanigiri }
1776b477063SVikram Kanigiri 
178af6491f8SAntonio Nino Diaz void tzc400_set_action(unsigned int action)
1796b477063SVikram Kanigiri {
180af6491f8SAntonio Nino Diaz 	assert(tzc400.base != 0U);
1816b477063SVikram Kanigiri 	assert(action <= TZC_ACTION_ERR_INT);
1826b477063SVikram Kanigiri 
1836b477063SVikram Kanigiri 	_tzc400_write_action(tzc400.base, action);
1846b477063SVikram Kanigiri }
1856b477063SVikram Kanigiri 
1866b477063SVikram Kanigiri void tzc400_init(uintptr_t base)
1876b477063SVikram Kanigiri {
1886b477063SVikram Kanigiri #if DEBUG
1896b477063SVikram Kanigiri 	unsigned int tzc400_id;
1906b477063SVikram Kanigiri #endif
1916b477063SVikram Kanigiri 	unsigned int tzc400_build;
1926b477063SVikram Kanigiri 
193af6491f8SAntonio Nino Diaz 	assert(base != 0U);
1946b477063SVikram Kanigiri 	tzc400.base = base;
1956b477063SVikram Kanigiri 
1966b477063SVikram Kanigiri #if DEBUG
1976b477063SVikram Kanigiri 	tzc400_id = _tzc_read_peripheral_id(base);
1986b477063SVikram Kanigiri 	if (tzc400_id != TZC_400_PERIPHERAL_ID) {
1996b477063SVikram Kanigiri 		ERROR("TZC-400 : Wrong device ID (0x%x).\n", tzc400_id);
2006b477063SVikram Kanigiri 		panic();
2016b477063SVikram Kanigiri 	}
2026b477063SVikram Kanigiri #endif
2036b477063SVikram Kanigiri 
2046b477063SVikram Kanigiri 	/* Save values we will use later. */
2056b477063SVikram Kanigiri 	tzc400_build = _tzc400_read_build_config(tzc400.base);
206af6491f8SAntonio Nino Diaz 	tzc400.num_filters = (uint8_t)((tzc400_build >> BUILD_CONFIG_NF_SHIFT) &
207af6491f8SAntonio Nino Diaz 					BUILD_CONFIG_NF_MASK) + 1U;
208af6491f8SAntonio Nino Diaz 	tzc400.addr_width  = (uint8_t)((tzc400_build >> BUILD_CONFIG_AW_SHIFT) &
209af6491f8SAntonio Nino Diaz 					BUILD_CONFIG_AW_MASK) + 1U;
210af6491f8SAntonio Nino Diaz 	tzc400.num_regions = (uint8_t)((tzc400_build >> BUILD_CONFIG_NR_SHIFT) &
211af6491f8SAntonio Nino Diaz 					BUILD_CONFIG_NR_MASK) + 1U;
2126b477063SVikram Kanigiri }
2136b477063SVikram Kanigiri 
2146b477063SVikram Kanigiri /*
2156b477063SVikram Kanigiri  * `tzc400_configure_region0` is used to program region 0 into the TrustZone
2166b477063SVikram Kanigiri  * controller. Region 0 covers the whole address space that is not mapped
2176b477063SVikram Kanigiri  * to any other region, and is enabled on all filters; this cannot be
2186b477063SVikram Kanigiri  * changed. This function only changes the access permissions.
2196b477063SVikram Kanigiri  */
220af6491f8SAntonio Nino Diaz void tzc400_configure_region0(unsigned int sec_attr,
2216b477063SVikram Kanigiri 			   unsigned int ns_device_access)
2226b477063SVikram Kanigiri {
223af6491f8SAntonio Nino Diaz 	assert(tzc400.base != 0U);
2246b477063SVikram Kanigiri 	assert(sec_attr <= TZC_REGION_S_RDWR);
2256b477063SVikram Kanigiri 
2266b477063SVikram Kanigiri 	_tzc400_configure_region0(tzc400.base, sec_attr, ns_device_access);
2276b477063SVikram Kanigiri }
2286b477063SVikram Kanigiri 
2296b477063SVikram Kanigiri /*
2306b477063SVikram Kanigiri  * `tzc400_configure_region` is used to program regions into the TrustZone
2316b477063SVikram Kanigiri  * controller. A region can be associated with more than one filter. The
232d4c61c38SHeyi Guo  * associated filters are passed in as a bitmap (bit0 = filter0), except that
233d4c61c38SHeyi Guo  * the value TZC_400_REGION_ATTR_FILTER_BIT_ALL selects all filters, based on
234d4c61c38SHeyi Guo  * the value of tzc400.num_filters.
2356b477063SVikram Kanigiri  * NOTE:
2366b477063SVikram Kanigiri  * Region 0 is special; it is preferable to use tzc400_configure_region0
2376b477063SVikram Kanigiri  * for this region (see comment for that function).
2386b477063SVikram Kanigiri  */
2396b477063SVikram Kanigiri void tzc400_configure_region(unsigned int filters,
240af6491f8SAntonio Nino Diaz 			  unsigned int region,
2419fbdb802SYatharth Kochar 			  unsigned long long region_base,
2429fbdb802SYatharth Kochar 			  unsigned long long region_top,
243af6491f8SAntonio Nino Diaz 			  unsigned int sec_attr,
2446b477063SVikram Kanigiri 			  unsigned int nsaid_permissions)
2456b477063SVikram Kanigiri {
246af6491f8SAntonio Nino Diaz 	assert(tzc400.base != 0U);
2476b477063SVikram Kanigiri 
248d4c61c38SHeyi Guo 	/* Adjust filter mask by real filter number */
249d4c61c38SHeyi Guo 	if (filters == TZC_400_REGION_ATTR_FILTER_BIT_ALL) {
250d4c61c38SHeyi Guo 		filters = (1U << tzc400.num_filters) - 1U;
251d4c61c38SHeyi Guo 	}
252d4c61c38SHeyi Guo 
2536b477063SVikram Kanigiri 	/* Do range checks on filters and regions. */
254af6491f8SAntonio Nino Diaz 	assert(((filters >> tzc400.num_filters) == 0U) &&
255af6491f8SAntonio Nino Diaz 	       (region < tzc400.num_regions));
2566b477063SVikram Kanigiri 
2576b477063SVikram Kanigiri 	/*
2586b477063SVikram Kanigiri 	 * Do address range check based on TZC configuration. A 64bit address is
2596b477063SVikram Kanigiri 	 * the max and expected case.
2606b477063SVikram Kanigiri 	 */
261b56ec680SSandrine Bailleux 	assert((region_top <= (UINT64_MAX >> (64U - tzc400.addr_width))) &&
262b56ec680SSandrine Bailleux 		(region_base < region_top));
2636b477063SVikram Kanigiri 
2646b477063SVikram Kanigiri 	/* region_base and (region_top + 1) must be 4KB aligned */
265af6491f8SAntonio Nino Diaz 	assert(((region_base | (region_top + 1U)) & (4096U - 1U)) == 0U);
2666b477063SVikram Kanigiri 
2676b477063SVikram Kanigiri 	assert(sec_attr <= TZC_REGION_S_RDWR);
2686b477063SVikram Kanigiri 
2696b477063SVikram Kanigiri 	_tzc400_configure_region(tzc400.base, filters, region, region_base,
2706b477063SVikram Kanigiri 						region_top,
2716b477063SVikram Kanigiri 						sec_attr, nsaid_permissions);
2726b477063SVikram Kanigiri }
2736b477063SVikram Kanigiri 
2746b477063SVikram Kanigiri void tzc400_enable_filters(void)
2756b477063SVikram Kanigiri {
2766b477063SVikram Kanigiri 	unsigned int state;
2776b477063SVikram Kanigiri 	unsigned int filter;
2786b477063SVikram Kanigiri 
279af6491f8SAntonio Nino Diaz 	assert(tzc400.base != 0U);
2806b477063SVikram Kanigiri 
281af6491f8SAntonio Nino Diaz 	for (filter = 0U; filter < tzc400.num_filters; filter++) {
2826b477063SVikram Kanigiri 		state = _tzc400_get_gate_keeper(tzc400.base, filter);
283af6491f8SAntonio Nino Diaz 		if (state != 0U) {
284fb1198b1SAntonio Nino Diaz 			/*
285fb1198b1SAntonio Nino Diaz 			 * The TZC filter is already configured. Changing the
2866b477063SVikram Kanigiri 			 * programmer's view in an active system can cause
2876b477063SVikram Kanigiri 			 * unpredictable behavior therefore panic for now rather
2886b477063SVikram Kanigiri 			 * than try to determine whether this is safe in this
289fb1198b1SAntonio Nino Diaz 			 * instance.
290fb1198b1SAntonio Nino Diaz 			 *
291fb1198b1SAntonio Nino Diaz 			 * See the 'ARM (R) CoreLink TM TZC-400 TrustZone (R)
292fb1198b1SAntonio Nino Diaz 			 * Address Space Controller' Technical Reference Manual.
293fb1198b1SAntonio Nino Diaz 			 */
2946b477063SVikram Kanigiri 			ERROR("TZC-400 : Filter %d Gatekeeper already"
2956b477063SVikram Kanigiri 				" enabled.\n", filter);
2966b477063SVikram Kanigiri 			panic();
2976b477063SVikram Kanigiri 		}
2986b477063SVikram Kanigiri 		_tzc400_set_gate_keeper(tzc400.base, filter, 1);
2996b477063SVikram Kanigiri 	}
3006b477063SVikram Kanigiri }
3016b477063SVikram Kanigiri 
3026b477063SVikram Kanigiri void tzc400_disable_filters(void)
3036b477063SVikram Kanigiri {
3046b477063SVikram Kanigiri 	unsigned int filter;
3056b477063SVikram Kanigiri 
306af6491f8SAntonio Nino Diaz 	assert(tzc400.base != 0U);
3076b477063SVikram Kanigiri 
3086b477063SVikram Kanigiri 	/*
3096b477063SVikram Kanigiri 	 * We don't do the same state check as above as the Gatekeepers are
3106b477063SVikram Kanigiri 	 * disabled after reset.
3116b477063SVikram Kanigiri 	 */
3126b477063SVikram Kanigiri 	for (filter = 0; filter < tzc400.num_filters; filter++)
3136b477063SVikram Kanigiri 		_tzc400_set_gate_keeper(tzc400.base, filter, 0);
3146b477063SVikram Kanigiri }
315*34c1a1a4SYann Gautier 
316*34c1a1a4SYann Gautier int tzc400_it_handler(void)
317*34c1a1a4SYann Gautier {
318*34c1a1a4SYann Gautier 	uint32_t filter;
319*34c1a1a4SYann Gautier 	uint32_t filter_it_pending = tzc400.num_filters;
320*34c1a1a4SYann Gautier 
321*34c1a1a4SYann Gautier 	assert(tzc400.base != 0U);
322*34c1a1a4SYann Gautier 
323*34c1a1a4SYann Gautier 	for (filter = 0U; filter < tzc400.num_filters; filter++) {
324*34c1a1a4SYann Gautier 		if (_tzc400_get_int_by_filter(tzc400.base, filter) != 0U) {
325*34c1a1a4SYann Gautier 			filter_it_pending = filter;
326*34c1a1a4SYann Gautier 			break;
327*34c1a1a4SYann Gautier 		}
328*34c1a1a4SYann Gautier 	}
329*34c1a1a4SYann Gautier 
330*34c1a1a4SYann Gautier 	if (filter_it_pending == tzc400.num_filters) {
331*34c1a1a4SYann Gautier 		ERROR("TZC-400: No interrupt pending!\n");
332*34c1a1a4SYann Gautier 		return -1;
333*34c1a1a4SYann Gautier 	}
334*34c1a1a4SYann Gautier 
335*34c1a1a4SYann Gautier #if DEBUG
336*34c1a1a4SYann Gautier 	_tzc400_dump_fail_filter(tzc400.base, filter_it_pending);
337*34c1a1a4SYann Gautier #endif
338*34c1a1a4SYann Gautier 
339*34c1a1a4SYann Gautier 	_tzc400_clear_it(tzc400.base, filter_it_pending);
340*34c1a1a4SYann Gautier 
341*34c1a1a4SYann Gautier 	return 0;
342*34c1a1a4SYann Gautier }
343