1 /* 2 * Copyright (c) 2019, ARM Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <stdint.h> 9 #include <drivers/arm/sbsa.h> 10 #include <lib/mmio.h> 11 #include <plat/common/platform.h> 12 13 void sbsa_watchdog_offset_reg_write(uintptr_t base, uint64_t value) 14 { 15 assert((value >> SBSA_WDOG_WOR_WIDTH) == 0); 16 mmio_write_32(base + SBSA_WDOG_WOR_LOW_OFFSET, 17 ((uint32_t)value & UINT32_MAX)); 18 mmio_write_32(base + SBSA_WDOG_WOR_HIGH_OFFSET, (uint32_t)(value >> 32)); 19 } 20 21 /* 22 * Start the watchdog timer at base address "base" for a 23 * period of "ms" milliseconds.The watchdog has to be 24 * refreshed within this time period. 25 */ 26 void sbsa_wdog_start(uintptr_t base, uint64_t ms) 27 { 28 uint64_t counter_freq; 29 uint64_t offset_reg_value; 30 31 counter_freq = (uint64_t)plat_get_syscnt_freq2(); 32 offset_reg_value = ms * counter_freq / 1000; 33 34 sbsa_watchdog_offset_reg_write(base, offset_reg_value); 35 mmio_write_32(base + SBSA_WDOG_WCS_OFFSET, SBSA_WDOG_WCS_EN); 36 } 37 38 /* Stop the watchdog */ 39 void sbsa_wdog_stop(uintptr_t base) 40 { 41 mmio_write_32(base + SBSA_WDOG_WCS_OFFSET, (0x0)); 42 } 43