1f79abf5eSAditya Angadi /* 2*e8166d3eSMadhukar Pappireddy * Copyright (c) 2019-2023, Arm Limited. All rights reserved. 3f79abf5eSAditya Angadi * 4f79abf5eSAditya Angadi * SPDX-License-Identifier: BSD-3-Clause 5f79abf5eSAditya Angadi */ 6f79abf5eSAditya Angadi 7b382ac68SBence Szépkúti #include <assert.h> 8b382ac68SBence Szépkúti #include <stdint.h> 9f79abf5eSAditya Angadi #include <drivers/arm/sbsa.h> 10f79abf5eSAditya Angadi #include <lib/mmio.h> 11b382ac68SBence Szépkúti #include <plat/common/platform.h> 12f79abf5eSAditya Angadi 13f79abf5eSAditya Angadi void sbsa_watchdog_offset_reg_write(uintptr_t base, uint64_t value) 14f79abf5eSAditya Angadi { 15f79abf5eSAditya Angadi assert((value >> SBSA_WDOG_WOR_WIDTH) == 0); 16f79abf5eSAditya Angadi mmio_write_32(base + SBSA_WDOG_WOR_LOW_OFFSET, 17f79abf5eSAditya Angadi ((uint32_t)value & UINT32_MAX)); 18f79abf5eSAditya Angadi mmio_write_32(base + SBSA_WDOG_WOR_HIGH_OFFSET, (uint32_t)(value >> 32)); 19f79abf5eSAditya Angadi } 20f79abf5eSAditya Angadi 21f79abf5eSAditya Angadi /* 22f79abf5eSAditya Angadi * Start the watchdog timer at base address "base" for a 23f79abf5eSAditya Angadi * period of "ms" milliseconds.The watchdog has to be 24f79abf5eSAditya Angadi * refreshed within this time period. 25f79abf5eSAditya Angadi */ 26f79abf5eSAditya Angadi void sbsa_wdog_start(uintptr_t base, uint64_t ms) 27f79abf5eSAditya Angadi { 28f79abf5eSAditya Angadi uint64_t counter_freq; 29f79abf5eSAditya Angadi uint64_t offset_reg_value; 30f79abf5eSAditya Angadi 31f79abf5eSAditya Angadi counter_freq = (uint64_t)plat_get_syscnt_freq2(); 32f79abf5eSAditya Angadi offset_reg_value = ms * counter_freq / 1000; 33f79abf5eSAditya Angadi 34f79abf5eSAditya Angadi sbsa_watchdog_offset_reg_write(base, offset_reg_value); 35f79abf5eSAditya Angadi mmio_write_32(base + SBSA_WDOG_WCS_OFFSET, SBSA_WDOG_WCS_EN); 36f79abf5eSAditya Angadi } 37f79abf5eSAditya Angadi 38f79abf5eSAditya Angadi /* Stop the watchdog */ 39f79abf5eSAditya Angadi void sbsa_wdog_stop(uintptr_t base) 40f79abf5eSAditya Angadi { 41f79abf5eSAditya Angadi mmio_write_32(base + SBSA_WDOG_WCS_OFFSET, (0x0)); 42f79abf5eSAditya Angadi } 43*e8166d3eSMadhukar Pappireddy 44*e8166d3eSMadhukar Pappireddy /* Refresh the secure watchdog timer explicitly */ 45*e8166d3eSMadhukar Pappireddy void sbsa_wdog_refresh(uintptr_t refresh_base) 46*e8166d3eSMadhukar Pappireddy { 47*e8166d3eSMadhukar Pappireddy mmio_write_32(refresh_base + SBSA_WDOG_WRR_OFFSET, SBSA_WDOG_WRR_REFRESH); 48*e8166d3eSMadhukar Pappireddy } 49