1a6ea06f5SAlexei Fedorov# 2a6ea06f5SAlexei Fedorov# Copyright (c) 2013-2020, Arm Limited and Contributors. All rights reserved. 3*2c248adeSVarun Wadekar# Copyright (c) 2021, NVIDIA Corporation. All rights reserved. 4a6ea06f5SAlexei Fedorov# 5a6ea06f5SAlexei Fedorov# SPDX-License-Identifier: BSD-3-Clause 6a6ea06f5SAlexei Fedorov# 7a6ea06f5SAlexei Fedorov 8a6ea06f5SAlexei Fedorov# Default configuration values 9b4ad365aSAndre PrzywaraGICV3_SUPPORT_GIC600 ?= 0 10*2c248adeSVarun WadekarGICV3_SUPPORT_GIC600AE_FMU ?= 0 11a6ea06f5SAlexei FedorovGICV3_IMPL_GIC600_MULTICHIP ?= 0 12a6ea06f5SAlexei FedorovGICV3_OVERRIDE_DISTIF_PWR_OPS ?= 0 135875f266SAlexei FedorovGIC_ENABLE_V4_EXTN ?= 0 148f3ad766SAlexei FedorovGIC_EXT_INTID ?= 0 15a6ea06f5SAlexei Fedorov 168f3ad766SAlexei FedorovGICV3_SOURCES += drivers/arm/gic/v3/gicv3_main.c \ 17a6ea06f5SAlexei Fedorov drivers/arm/gic/v3/gicv3_helpers.c \ 18a6ea06f5SAlexei Fedorov drivers/arm/gic/v3/gicdv3_helpers.c \ 19a6ea06f5SAlexei Fedorov drivers/arm/gic/v3/gicrv3_helpers.c 20a6ea06f5SAlexei Fedorov 21*2c248adeSVarun Wadekarifeq (${GICV3_SUPPORT_GIC600AE_FMU}, 1) 22*2c248adeSVarun WadekarGICV3_SOURCES += drivers/arm/gic/v3/gic600ae_fmu.c \ 23*2c248adeSVarun Wadekar drivers/arm/gic/v3/gic600ae_fmu_helpers.c 24*2c248adeSVarun Wadekarendif 25*2c248adeSVarun Wadekar 26a6ea06f5SAlexei Fedorovifeq (${GICV3_OVERRIDE_DISTIF_PWR_OPS}, 0) 27a6ea06f5SAlexei FedorovGICV3_SOURCES += drivers/arm/gic/v3/arm_gicv3_common.c 28a6ea06f5SAlexei Fedorovendif 29a6ea06f5SAlexei Fedorov 30b4ad365aSAndre PrzywaraGICV3_SOURCES += drivers/arm/gic/v3/gic-x00.c 31a6ea06f5SAlexei Fedorovifeq (${GICV3_IMPL_GIC600_MULTICHIP}, 1) 32a6ea06f5SAlexei FedorovGICV3_SOURCES += drivers/arm/gic/v3/gic600_multichip.c 33a6ea06f5SAlexei Fedorovendif 34b4ad365aSAndre Przywara 35b4ad365aSAndre Przywara# Set GIC-600 support 36b4ad365aSAndre Przywara$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600)) 37b4ad365aSAndre Przywara$(eval $(call add_define,GICV3_SUPPORT_GIC600)) 388f3ad766SAlexei Fedorov 39*2c248adeSVarun Wadekar# Set GIC-600AE FMU support 40*2c248adeSVarun Wadekar$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600AE_FMU)) 41*2c248adeSVarun Wadekar$(eval $(call add_define,GICV3_SUPPORT_GIC600AE_FMU)) 42*2c248adeSVarun Wadekar 435875f266SAlexei Fedorov# Set GICv4 extension 445875f266SAlexei Fedorov$(eval $(call assert_boolean,GIC_ENABLE_V4_EXTN)) 455875f266SAlexei Fedorov$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 465875f266SAlexei Fedorov 478f3ad766SAlexei Fedorov# Set support for extended PPI and SPI range 488f3ad766SAlexei Fedorov$(eval $(call assert_boolean,GIC_EXT_INTID)) 498f3ad766SAlexei Fedorov$(eval $(call add_define,GIC_EXT_INTID)) 50