1 /* 2 * Copyright (c) 2017-2025, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * Driver for GIC-500 and GIC-600 specific features. This driver only 10 * overrides APIs that are different to those generic ones in GICv3 11 * driver. 12 * 13 * GIC-600 supports independently power-gating redistributor interface. 14 */ 15 16 #include <assert.h> 17 18 #include <arch_helpers.h> 19 #include <common/debug.h> 20 #include <drivers/arm/arm_gicv3_common.h> 21 #include <drivers/arm/gicv3.h> 22 23 #include "gicv3_private.h" 24 25 /* GIC-600 specific register offsets */ 26 #define GICR_PWRR 0x24U 27 28 /* GICR_PWRR fields */ 29 #define PWRR_RDPD_SHIFT 0 30 #define PWRR_RDAG_SHIFT 1 31 #define PWRR_RDGPD_SHIFT 2 32 #define PWRR_RDGPO_SHIFT 3 33 34 #define PWRR_RDPD (1U << PWRR_RDPD_SHIFT) 35 #define PWRR_RDAG (1U << PWRR_RDAG_SHIFT) 36 #define PWRR_RDGPD (1U << PWRR_RDGPD_SHIFT) 37 #define PWRR_RDGPO (1U << PWRR_RDGPO_SHIFT) 38 39 /* 40 * Values to write to GICR_PWRR register to power redistributor 41 * for operating through the core (GICR_PWRR.RDAG = 0) 42 */ 43 #define PWRR_ON (0U << PWRR_RDPD_SHIFT) 44 #define PWRR_OFF (1U << PWRR_RDPD_SHIFT) 45 46 static bool gic600_errata_wa_2384374 __unused; 47 48 #if GICV3_SUPPORT_GIC600 49 50 /* GIC-600/700 specific accessor functions */ 51 static void gicr_write_pwrr(uintptr_t base, unsigned int val) 52 { 53 mmio_write_32(base + GICR_PWRR, val); 54 } 55 56 static uint32_t gicr_read_pwrr(uintptr_t base) 57 { 58 return mmio_read_32(base + GICR_PWRR); 59 } 60 61 static void gicr_wait_group_not_in_transit(uintptr_t base) 62 { 63 uint32_t pwrr; 64 65 do { 66 pwrr = gicr_read_pwrr(base); 67 68 /* Check group not transitioning: RDGPD == RDGPO */ 69 } while (((pwrr & PWRR_RDGPD) >> PWRR_RDGPD_SHIFT) != 70 ((pwrr & PWRR_RDGPO) >> PWRR_RDGPO_SHIFT)); 71 } 72 73 static void gic600_pwr_on(uintptr_t base) 74 { 75 do { /* Wait until group not transitioning */ 76 gicr_wait_group_not_in_transit(base); 77 78 /* Power on redistributor */ 79 gicr_write_pwrr(base, PWRR_ON); 80 81 /* 82 * Wait until the power on state is reflected. 83 * If RDPD == 0 then powered on. 84 */ 85 } while ((gicr_read_pwrr(base) & PWRR_RDPD) != PWRR_ON); 86 } 87 88 static void gic600_pwr_off(uintptr_t base) 89 { 90 /* Wait until group not transitioning */ 91 gicr_wait_group_not_in_transit(base); 92 93 /* Power off redistributor */ 94 gicr_write_pwrr(base, PWRR_OFF); 95 96 /* 97 * If this is the last man, turning this redistributor frame off will 98 * result in the group itself being powered off and RDGPD = 1. 99 * In that case, wait as long as it's in transition, or has aborted 100 * the transition altogether for any reason. 101 */ 102 if ((gicr_read_pwrr(base) & PWRR_RDGPD) != 0U) { 103 /* Wait until group not transitioning */ 104 gicr_wait_group_not_in_transit(base); 105 } 106 } 107 108 static uintptr_t get_gicr_base(unsigned int proc_num) 109 { 110 uintptr_t gicr_base; 111 112 assert(gicv3_driver_data != NULL); 113 assert(proc_num < gicv3_driver_data->rdistif_num); 114 assert(gicv3_driver_data->rdistif_base_addrs != NULL); 115 116 gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num]; 117 assert(gicr_base != 0UL); 118 119 return gicr_base; 120 } 121 122 static bool gicv3_redists_need_power_mgmt(uintptr_t gicr_base) 123 { 124 uint32_t reg = mmio_read_32(gicr_base + GICR_IIDR); 125 126 /* 127 * The Arm GIC-600 and GIC-700 models have their redistributors 128 * powered down at reset. 129 */ 130 return (((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600) || 131 ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600AE) || 132 ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_700) || 133 ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_720AE)); 134 } 135 136 #endif /* GICV3_SUPPORT_GIC600 */ 137 138 void gicv3_distif_pre_save(unsigned int proc_num) 139 { 140 arm_gicv3_distif_pre_save(proc_num); 141 } 142 143 void gicv3_distif_post_restore(unsigned int proc_num) 144 { 145 arm_gicv3_distif_post_restore(proc_num); 146 } 147 148 /* 149 * Power off GIC-600 redistributor (if configured and detected) 150 */ 151 void gicv3_rdistif_off(unsigned int proc_num) 152 { 153 #if GICV3_SUPPORT_GIC600 154 uintptr_t gicr_base = get_gicr_base(proc_num); 155 156 /* Attempt to power redistributor off */ 157 if (gicv3_redists_need_power_mgmt(gicr_base)) { 158 gic600_pwr_off(gicr_base); 159 } 160 #endif 161 } 162 163 /* 164 * Power on GIC-600 redistributor (if configured and detected) 165 */ 166 void gicv3_rdistif_on(unsigned int proc_num) 167 { 168 #if GICV3_SUPPORT_GIC600 169 uintptr_t gicr_base = get_gicr_base(proc_num); 170 171 /* Power redistributor on */ 172 if (gicv3_redists_need_power_mgmt(gicr_base)) { 173 gic600_pwr_on(gicr_base); 174 } 175 #endif 176 } 177 178 #if GIC600_ERRATA_WA_2384374 179 /******************************************************************************* 180 * Apply part 2 of workaround for errata-2384374 as per SDEN: 181 * https://developer.arm.com/documentation/sden892601/latest/ 182 ******************************************************************************/ 183 void gicv3_apply_errata_wa_2384374(uintptr_t gicr_base) 184 { 185 if (gic600_errata_wa_2384374) { 186 uint32_t gicr_ctlr_val = gicr_read_ctlr(gicr_base); 187 188 gicr_write_ctlr(gicr_base, gicr_ctlr_val | 189 (GICR_CTLR_DPG0_BIT | GICR_CTLR_DPG1NS_BIT | 190 GICR_CTLR_DPG1S_BIT)); 191 gicr_write_ctlr(gicr_base, gicr_ctlr_val & 192 ~(GICR_CTLR_DPG0_BIT | GICR_CTLR_DPG1NS_BIT | 193 GICR_CTLR_DPG1S_BIT)); 194 } 195 } 196 #endif /* GIC600_ERRATA_WA_2384374 */ 197 198 void gicv3_check_erratas_applies(const uintptr_t gicd_base) 199 { 200 unsigned int gic_prod_id; 201 uint8_t gic_rev; 202 203 assert(gicd_base != 0UL); 204 205 gicv3_get_component_prodid_rev(gicd_base, &gic_prod_id, &gic_rev); 206 207 /* 208 * This workaround applicable only to GIC600 and GIC600AE products with 209 * revision less than r1p6 and r0p2 respectively. 210 * As per GIC600/GIC600AE specification - 211 * r1p6 = 0x17 => GICD_IIDR[19:12] 212 * r0p2 = 0x04 => GICD_IIDR[19:12] 213 */ 214 if ((gic_prod_id == GIC_PRODUCT_ID_GIC600) || 215 (gic_prod_id == GIC_PRODUCT_ID_GIC600AE)) { 216 if (((gic_prod_id == GIC_PRODUCT_ID_GIC600) && 217 (gic_rev <= GIC_REV(GIC_VARIANT_R1, GIC_REV_P6))) || 218 ((gic_prod_id == GIC_PRODUCT_ID_GIC600AE) && 219 (gic_rev <= GIC_REV(GIC_VARIANT_R0, GIC_REV_P2)))) { 220 #if GIC600_ERRATA_WA_2384374 221 gic600_errata_wa_2384374 = true; 222 VERBOSE("%s applies\n", 223 "GIC600/GIC600AE errata workaround 2384374"); 224 #else 225 WARN("%s missing\n", 226 "GIC600/GIC600AE errata workaround 2384374"); 227 #endif /* GIC600_ERRATA_WA_2384374 */ 228 } else { 229 VERBOSE("%s not applies\n", 230 "GIC600/GIC600AE errata workaround 2384374"); 231 } 232 } 233 } 234