1 /* 2 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 3 * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * Driver for GIC-500 and GIC-600 specific features. This driver only 10 * overrides APIs that are different to those generic ones in GICv3 11 * driver. 12 * 13 * GIC-600 supports independently power-gating redistributor interface. 14 */ 15 16 #include <assert.h> 17 18 #include <arch_helpers.h> 19 #include <drivers/arm/gicv3.h> 20 21 #include "gicv3_private.h" 22 23 /* GIC-600 specific register offsets */ 24 #define GICR_PWRR 0x24 25 #define IIDR_MODEL_ARM_GIC_600 (0x0200043b) 26 #define IIDR_MODEL_ARM_GIC_600AE (0x0300043b) 27 #define IIDR_MODEL_ARM_GIC_CLAYTON (0x0400043b) 28 29 /* GICR_PWRR fields */ 30 #define PWRR_RDPD_SHIFT 0 31 #define PWRR_RDAG_SHIFT 1 32 #define PWRR_RDGPD_SHIFT 2 33 #define PWRR_RDGPO_SHIFT 3 34 35 #define PWRR_RDPD (1 << PWRR_RDPD_SHIFT) 36 #define PWRR_RDAG (1 << PWRR_RDAG_SHIFT) 37 #define PWRR_RDGPD (1 << PWRR_RDGPD_SHIFT) 38 #define PWRR_RDGPO (1 << PWRR_RDGPO_SHIFT) 39 40 /* 41 * Values to write to GICR_PWRR register to power redistributor 42 * for operating through the core (GICR_PWRR.RDAG = 0) 43 */ 44 #define PWRR_ON (0 << PWRR_RDPD_SHIFT) 45 #define PWRR_OFF (1 << PWRR_RDPD_SHIFT) 46 47 #if GICV3_SUPPORT_GIC600 48 49 /* GIC-600/Clayton specific accessor functions */ 50 static void gicr_write_pwrr(uintptr_t base, unsigned int val) 51 { 52 mmio_write_32(base + GICR_PWRR, val); 53 } 54 55 static uint32_t gicr_read_pwrr(uintptr_t base) 56 { 57 return mmio_read_32(base + GICR_PWRR); 58 } 59 60 static void gicr_wait_group_not_in_transit(uintptr_t base) 61 { 62 /* Check group not transitioning: RDGPD == RDGPO */ 63 while (((gicr_read_pwrr(base) & PWRR_RDGPD) >> PWRR_RDGPD_SHIFT) != 64 ((gicr_read_pwrr(base) & PWRR_RDGPO) >> PWRR_RDGPO_SHIFT)) 65 ; 66 } 67 68 static void gic600_pwr_on(uintptr_t base) 69 { 70 do { /* Wait until group not transitioning */ 71 gicr_wait_group_not_in_transit(base); 72 73 /* Power on redistributor */ 74 gicr_write_pwrr(base, PWRR_ON); 75 76 /* 77 * Wait until the power on state is reflected. 78 * If RDPD == 0 then powered on. 79 */ 80 } while ((gicr_read_pwrr(base) & PWRR_RDPD) != PWRR_ON); 81 } 82 83 static void gic600_pwr_off(uintptr_t base) 84 { 85 /* Wait until group not transitioning */ 86 gicr_wait_group_not_in_transit(base); 87 88 /* Power off redistributor */ 89 gicr_write_pwrr(base, PWRR_OFF); 90 91 /* 92 * If this is the last man, turning this redistributor frame off will 93 * result in the group itself being powered off and RDGPD = 1. 94 * In that case, wait as long as it's in transition, or has aborted 95 * the transition altogether for any reason. 96 */ 97 if ((gicr_read_pwrr(base) & PWRR_RDGPD) != 0) { 98 /* Wait until group not transitioning */ 99 gicr_wait_group_not_in_transit(base); 100 } 101 } 102 103 static uintptr_t get_gicr_base(unsigned int proc_num) 104 { 105 uintptr_t gicr_base; 106 107 assert(gicv3_driver_data); 108 assert(proc_num < gicv3_driver_data->rdistif_num); 109 assert(gicv3_driver_data->rdistif_base_addrs); 110 111 gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num]; 112 assert(gicr_base); 113 114 return gicr_base; 115 } 116 117 static bool gicv3_redists_need_power_mgmt(uintptr_t gicr_base) 118 { 119 uint32_t reg = mmio_read_32(gicr_base + GICR_IIDR); 120 121 /* 122 * The Arm GIC-600 and GIC-Clayton models have their redistributors 123 * powered down at reset. 124 */ 125 return (((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600) || 126 ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600AE) || 127 ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_CLAYTON)); 128 } 129 130 #endif 131 132 void gicv3_distif_pre_save(unsigned int proc_num) 133 { 134 arm_gicv3_distif_pre_save(proc_num); 135 } 136 137 void gicv3_distif_post_restore(unsigned int proc_num) 138 { 139 arm_gicv3_distif_post_restore(proc_num); 140 } 141 142 143 /* 144 * Power off GIC-600 redistributor (if configured and detected) 145 */ 146 void gicv3_rdistif_off(unsigned int proc_num) 147 { 148 #if GICV3_SUPPORT_GIC600 149 uintptr_t gicr_base = get_gicr_base(proc_num); 150 151 /* Attempt to power redistributor off */ 152 if (gicv3_redists_need_power_mgmt(gicr_base)) { 153 gic600_pwr_off(gicr_base); 154 } 155 #endif 156 } 157 158 /* 159 * Power on GIC-600 redistributor (if configured and detected) 160 */ 161 void gicv3_rdistif_on(unsigned int proc_num) 162 { 163 #if GICV3_SUPPORT_GIC600 164 uintptr_t gicr_base = get_gicr_base(proc_num); 165 166 /* Power redistributor on */ 167 if (gicv3_redists_need_power_mgmt(gicr_base)) { 168 gic600_pwr_on(gicr_base); 169 } 170 #endif 171 } 172