1 /* 2 * Copyright (c) 2017-2022, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * Driver for GIC-500 and GIC-600 specific features. This driver only 10 * overrides APIs that are different to those generic ones in GICv3 11 * driver. 12 * 13 * GIC-600 supports independently power-gating redistributor interface. 14 */ 15 16 #include <assert.h> 17 18 #include <arch_helpers.h> 19 #include <drivers/arm/arm_gicv3_common.h> 20 #include <drivers/arm/gicv3.h> 21 22 #include "gicv3_private.h" 23 24 /* GIC-600 specific register offsets */ 25 #define GICR_PWRR 0x24U 26 27 /* GICR_PWRR fields */ 28 #define PWRR_RDPD_SHIFT 0 29 #define PWRR_RDAG_SHIFT 1 30 #define PWRR_RDGPD_SHIFT 2 31 #define PWRR_RDGPO_SHIFT 3 32 33 #define PWRR_RDPD (1U << PWRR_RDPD_SHIFT) 34 #define PWRR_RDAG (1U << PWRR_RDAG_SHIFT) 35 #define PWRR_RDGPD (1U << PWRR_RDGPD_SHIFT) 36 #define PWRR_RDGPO (1U << PWRR_RDGPO_SHIFT) 37 38 /* 39 * Values to write to GICR_PWRR register to power redistributor 40 * for operating through the core (GICR_PWRR.RDAG = 0) 41 */ 42 #define PWRR_ON (0U << PWRR_RDPD_SHIFT) 43 #define PWRR_OFF (1U << PWRR_RDPD_SHIFT) 44 45 static bool gic600_errata_wa_2384374 __unused; 46 47 #if GICV3_SUPPORT_GIC600 48 49 /* GIC-600/700 specific accessor functions */ 50 static void gicr_write_pwrr(uintptr_t base, unsigned int val) 51 { 52 mmio_write_32(base + GICR_PWRR, val); 53 } 54 55 static uint32_t gicr_read_pwrr(uintptr_t base) 56 { 57 return mmio_read_32(base + GICR_PWRR); 58 } 59 60 static void gicr_wait_group_not_in_transit(uintptr_t base) 61 { 62 uint32_t pwrr; 63 64 do { 65 pwrr = gicr_read_pwrr(base); 66 67 /* Check group not transitioning: RDGPD == RDGPO */ 68 } while (((pwrr & PWRR_RDGPD) >> PWRR_RDGPD_SHIFT) != 69 ((pwrr & PWRR_RDGPO) >> PWRR_RDGPO_SHIFT)); 70 } 71 72 static void gic600_pwr_on(uintptr_t base) 73 { 74 do { /* Wait until group not transitioning */ 75 gicr_wait_group_not_in_transit(base); 76 77 /* Power on redistributor */ 78 gicr_write_pwrr(base, PWRR_ON); 79 80 /* 81 * Wait until the power on state is reflected. 82 * If RDPD == 0 then powered on. 83 */ 84 } while ((gicr_read_pwrr(base) & PWRR_RDPD) != PWRR_ON); 85 } 86 87 static void gic600_pwr_off(uintptr_t base) 88 { 89 /* Wait until group not transitioning */ 90 gicr_wait_group_not_in_transit(base); 91 92 /* Power off redistributor */ 93 gicr_write_pwrr(base, PWRR_OFF); 94 95 /* 96 * If this is the last man, turning this redistributor frame off will 97 * result in the group itself being powered off and RDGPD = 1. 98 * In that case, wait as long as it's in transition, or has aborted 99 * the transition altogether for any reason. 100 */ 101 if ((gicr_read_pwrr(base) & PWRR_RDGPD) != 0U) { 102 /* Wait until group not transitioning */ 103 gicr_wait_group_not_in_transit(base); 104 } 105 } 106 107 static uintptr_t get_gicr_base(unsigned int proc_num) 108 { 109 uintptr_t gicr_base; 110 111 assert(gicv3_driver_data != NULL); 112 assert(proc_num < gicv3_driver_data->rdistif_num); 113 assert(gicv3_driver_data->rdistif_base_addrs != NULL); 114 115 gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num]; 116 assert(gicr_base != 0UL); 117 118 return gicr_base; 119 } 120 121 static bool gicv3_redists_need_power_mgmt(uintptr_t gicr_base) 122 { 123 uint32_t reg = mmio_read_32(gicr_base + GICR_IIDR); 124 125 /* 126 * The Arm GIC-600 and GIC-700 models have their redistributors 127 * powered down at reset. 128 */ 129 return (((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600) || 130 ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600AE) || 131 ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_700)); 132 } 133 134 #endif /* GICV3_SUPPORT_GIC600 */ 135 136 void gicv3_distif_pre_save(unsigned int proc_num) 137 { 138 arm_gicv3_distif_pre_save(proc_num); 139 } 140 141 void gicv3_distif_post_restore(unsigned int proc_num) 142 { 143 arm_gicv3_distif_post_restore(proc_num); 144 } 145 146 /* 147 * Power off GIC-600 redistributor (if configured and detected) 148 */ 149 void gicv3_rdistif_off(unsigned int proc_num) 150 { 151 #if GICV3_SUPPORT_GIC600 152 uintptr_t gicr_base = get_gicr_base(proc_num); 153 154 /* Attempt to power redistributor off */ 155 if (gicv3_redists_need_power_mgmt(gicr_base)) { 156 gic600_pwr_off(gicr_base); 157 } 158 #endif 159 } 160 161 /* 162 * Power on GIC-600 redistributor (if configured and detected) 163 */ 164 void gicv3_rdistif_on(unsigned int proc_num) 165 { 166 #if GICV3_SUPPORT_GIC600 167 uintptr_t gicr_base = get_gicr_base(proc_num); 168 169 /* Power redistributor on */ 170 if (gicv3_redists_need_power_mgmt(gicr_base)) { 171 gic600_pwr_on(gicr_base); 172 } 173 #endif 174 } 175 176 #if GIC600_ERRATA_WA_2384374 177 /******************************************************************************* 178 * Apply part 2 of workaround for errata-2384374 as per SDEN: 179 * https://developer.arm.com/documentation/sden892601/latest/ 180 ******************************************************************************/ 181 void gicv3_apply_errata_wa_2384374(uintptr_t gicr_base) 182 { 183 if (gic600_errata_wa_2384374) { 184 uint32_t gicr_ctlr_val = gicr_read_ctlr(gicr_base); 185 186 gicr_write_ctlr(gicr_base, gicr_ctlr_val | 187 (GICR_CTLR_DPG0_BIT | GICR_CTLR_DPG1NS_BIT | 188 GICR_CTLR_DPG1S_BIT)); 189 gicr_write_ctlr(gicr_base, gicr_ctlr_val & 190 ~(GICR_CTLR_DPG0_BIT | GICR_CTLR_DPG1NS_BIT | 191 GICR_CTLR_DPG1S_BIT)); 192 } 193 } 194 #endif /* GIC600_ERRATA_WA_2384374 */ 195 196 void gicv3_check_erratas_applies(uintptr_t gicd_base) 197 { 198 unsigned int gic_prod_id; 199 uint8_t gic_rev; 200 201 assert(gicd_base != 0UL); 202 203 gicv3_get_component_prodid_rev(gicd_base, &gic_prod_id, &gic_rev); 204 205 /* 206 * This workaround applicable only to GIC600 and GIC600AE products with 207 * revision less than r1p6 and r0p2 respectively. 208 * As per GIC600/GIC600AE specification - 209 * r1p6 = 0x17 => GICD_IIDR[19:12] 210 * r0p2 = 0x04 => GICD_IIDR[19:12] 211 */ 212 if ((gic_prod_id == GIC_PRODUCT_ID_GIC600) || 213 (gic_prod_id == GIC_PRODUCT_ID_GIC600AE)) { 214 if (((gic_prod_id == GIC_PRODUCT_ID_GIC600) && 215 (gic_rev <= GIC_REV(GIC_VARIANT_R1, GIC_REV_P6))) || 216 ((gic_prod_id == GIC_PRODUCT_ID_GIC600AE) && 217 (gic_rev <= GIC_REV(GIC_VARIANT_R0, GIC_REV_P2)))) { 218 #if GIC600_ERRATA_WA_2384374 219 gic600_errata_wa_2384374 = true; 220 VERBOSE("%s applies\n", 221 "GIC600/GIC600AE errata workaround 2384374"); 222 #else 223 WARN("%s missing\n", 224 "GIC600/GIC600AE errata workaround 2384374"); 225 #endif /* GIC600_ERRATA_WA_2384374 */ 226 } else { 227 VERBOSE("%s not applies\n", 228 "GIC600/GIC600AE errata workaround 2384374"); 229 } 230 } 231 } 232