1 /* 2 * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. 3 * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * Driver for GIC-500 and GIC-600 specific features. This driver only 10 * overrides APIs that are different to those generic ones in GICv3 11 * driver. 12 * 13 * GIC-600 supports independently power-gating redistributor interface. 14 */ 15 16 #include <assert.h> 17 18 #include <arch_helpers.h> 19 #include <drivers/arm/gicv3.h> 20 21 #include "gicv3_private.h" 22 23 /* GIC-600 specific register offsets */ 24 #define GICR_PWRR 0x24 25 #define IIDR_MODEL_ARM_GIC_600 (0x0200043b) 26 #define IIDR_MODEL_ARM_GIC_600AE (0x0300043b) 27 28 /* GICR_PWRR fields */ 29 #define PWRR_RDPD_SHIFT 0 30 #define PWRR_RDAG_SHIFT 1 31 #define PWRR_RDGPD_SHIFT 2 32 #define PWRR_RDGPO_SHIFT 3 33 34 #define PWRR_RDPD (1 << PWRR_RDPD_SHIFT) 35 #define PWRR_RDAG (1 << PWRR_RDAG_SHIFT) 36 #define PWRR_RDGPD (1 << PWRR_RDGPD_SHIFT) 37 #define PWRR_RDGPO (1 << PWRR_RDGPO_SHIFT) 38 39 /* 40 * Values to write to GICR_PWRR register to power redistributor 41 * for operating through the core (GICR_PWRR.RDAG = 0) 42 */ 43 #define PWRR_ON (0 << PWRR_RDPD_SHIFT) 44 #define PWRR_OFF (1 << PWRR_RDPD_SHIFT) 45 46 #if GICV3_SUPPORT_GIC600 47 48 /* GIC-600 specific accessor functions */ 49 static void gicr_write_pwrr(uintptr_t base, unsigned int val) 50 { 51 mmio_write_32(base + GICR_PWRR, val); 52 } 53 54 static uint32_t gicr_read_pwrr(uintptr_t base) 55 { 56 return mmio_read_32(base + GICR_PWRR); 57 } 58 59 static void gicr_wait_group_not_in_transit(uintptr_t base) 60 { 61 /* Check group not transitioning: RDGPD == RDGPO */ 62 while (((gicr_read_pwrr(base) & PWRR_RDGPD) >> PWRR_RDGPD_SHIFT) != 63 ((gicr_read_pwrr(base) & PWRR_RDGPO) >> PWRR_RDGPO_SHIFT)) 64 ; 65 } 66 67 static void gic600_pwr_on(uintptr_t base) 68 { 69 do { /* Wait until group not transitioning */ 70 gicr_wait_group_not_in_transit(base); 71 72 /* Power on redistributor */ 73 gicr_write_pwrr(base, PWRR_ON); 74 75 /* 76 * Wait until the power on state is reflected. 77 * If RDPD == 0 then powered on. 78 */ 79 } while ((gicr_read_pwrr(base) & PWRR_RDPD) != PWRR_ON); 80 } 81 82 static void gic600_pwr_off(uintptr_t base) 83 { 84 /* Wait until group not transitioning */ 85 gicr_wait_group_not_in_transit(base); 86 87 /* Power off redistributor */ 88 gicr_write_pwrr(base, PWRR_OFF); 89 90 /* 91 * If this is the last man, turning this redistributor frame off will 92 * result in the group itself being powered off and RDGPD = 1. 93 * In that case, wait as long as it's in transition, or has aborted 94 * the transition altogether for any reason. 95 */ 96 if ((gicr_read_pwrr(base) & PWRR_RDGPD) != 0) { 97 /* Wait until group not transitioning */ 98 gicr_wait_group_not_in_transit(base); 99 } 100 } 101 102 static uintptr_t get_gicr_base(unsigned int proc_num) 103 { 104 uintptr_t gicr_base; 105 106 assert(gicv3_driver_data); 107 assert(proc_num < gicv3_driver_data->rdistif_num); 108 assert(gicv3_driver_data->rdistif_base_addrs); 109 110 gicr_base = gicv3_driver_data->rdistif_base_addrs[proc_num]; 111 assert(gicr_base); 112 113 return gicr_base; 114 } 115 116 static bool gicv3_is_gic600(uintptr_t gicr_base) 117 { 118 uint32_t reg = mmio_read_32(gicr_base + GICR_IIDR); 119 120 return (((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600) || 121 ((reg & IIDR_MODEL_MASK) == IIDR_MODEL_ARM_GIC_600AE)); 122 } 123 124 #endif 125 126 void gicv3_distif_pre_save(unsigned int proc_num) 127 { 128 arm_gicv3_distif_pre_save(proc_num); 129 } 130 131 void gicv3_distif_post_restore(unsigned int proc_num) 132 { 133 arm_gicv3_distif_post_restore(proc_num); 134 } 135 136 137 /* 138 * Power off GIC-600 redistributor (if configured and detected) 139 */ 140 void gicv3_rdistif_off(unsigned int proc_num) 141 { 142 #if GICV3_SUPPORT_GIC600 143 uintptr_t gicr_base = get_gicr_base(proc_num); 144 145 /* Attempt to power redistributor off */ 146 if (gicv3_is_gic600(gicr_base)) { 147 gic600_pwr_off(gicr_base); 148 } 149 #endif 150 } 151 152 /* 153 * Power on GIC-600 redistributor (if configured and detected) 154 */ 155 void gicv3_rdistif_on(unsigned int proc_num) 156 { 157 #if GICV3_SUPPORT_GIC600 158 uintptr_t gicr_base = get_gicr_base(proc_num); 159 160 /* Power redistributor on */ 161 if (gicv3_is_gic600(gicr_base)) { 162 gic600_pwr_on(gicr_base); 163 } 164 #endif 165 } 166