15d893410SBoyan Karatotev /* 25d893410SBoyan Karatotev * Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved. 35d893410SBoyan Karatotev * 45d893410SBoyan Karatotev * SPDX-License-Identifier: BSD-3-Clause 55d893410SBoyan Karatotev */ 65d893410SBoyan Karatotev 75d893410SBoyan Karatotev #include <platform_def.h> 85d893410SBoyan Karatotev 95d893410SBoyan Karatotev #include <drivers/arm/gic.h> 105d893410SBoyan Karatotev #include <drivers/arm/gicv2.h> 115d893410SBoyan Karatotev #include <plat/arm/common/plat_arm.h> 125d893410SBoyan Karatotev #include <plat/common/platform.h> 135d893410SBoyan Karatotev 145d893410SBoyan Karatotev #if USE_GIC_DRIVER != 2 15*df21ca08SBoyan Karatotev #error "This file should only be used with USE_GIC_DRIVER=2" 165d893410SBoyan Karatotev #endif 175d893410SBoyan Karatotev 185d893410SBoyan Karatotev /****************************************************************************** 195d893410SBoyan Karatotev * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 205d893410SBoyan Karatotev * interrupts. 215d893410SBoyan Karatotev *****************************************************************************/ 225d893410SBoyan Karatotev static const interrupt_prop_t arm_interrupt_props[] = { 235d893410SBoyan Karatotev PLAT_ARM_G1S_IRQ_PROPS(GICV2_INTR_GROUP0), 245d893410SBoyan Karatotev PLAT_ARM_G0_IRQ_PROPS(GICV2_INTR_GROUP0) 255d893410SBoyan Karatotev }; 265d893410SBoyan Karatotev 275d893410SBoyan Karatotev static unsigned int target_mask_array[PLATFORM_CORE_COUNT]; 285d893410SBoyan Karatotev 295d893410SBoyan Karatotev static const gicv2_driver_data_t arm_gic_data = { 305d893410SBoyan Karatotev .gicd_base = PLAT_ARM_GICD_BASE, 315d893410SBoyan Karatotev .gicc_base = PLAT_ARM_GICC_BASE, 325d893410SBoyan Karatotev .interrupt_props = arm_interrupt_props, 335d893410SBoyan Karatotev .interrupt_props_num = ARRAY_SIZE(arm_interrupt_props), 345d893410SBoyan Karatotev .target_masks = target_mask_array, 355d893410SBoyan Karatotev .target_masks_num = ARRAY_SIZE(target_mask_array), 365d893410SBoyan Karatotev }; 375d893410SBoyan Karatotev 385d893410SBoyan Karatotev /****************************************************************************** 395d893410SBoyan Karatotev * ARM common helper to initialize the GICv2 only driver. 405d893410SBoyan Karatotev *****************************************************************************/ 415d893410SBoyan Karatotev void __init gic_init(unsigned int cpu_idx) 425d893410SBoyan Karatotev { 435d893410SBoyan Karatotev gicv2_driver_init(&arm_gic_data); 445d893410SBoyan Karatotev gicv2_distif_init(); 455d893410SBoyan Karatotev } 465d893410SBoyan Karatotev 475d893410SBoyan Karatotev /****************************************************************************** 485d893410SBoyan Karatotev * ARM common helper to enable the GICv2 CPU interface 495d893410SBoyan Karatotev *****************************************************************************/ 505d893410SBoyan Karatotev void gic_cpuif_enable(unsigned int cpu_idx) 515d893410SBoyan Karatotev { 525d893410SBoyan Karatotev gicv2_cpuif_enable(); 535d893410SBoyan Karatotev } 545d893410SBoyan Karatotev 555d893410SBoyan Karatotev /****************************************************************************** 565d893410SBoyan Karatotev * ARM common helper to disable the GICv2 CPU interface 575d893410SBoyan Karatotev *****************************************************************************/ 585d893410SBoyan Karatotev void gic_cpuif_disable(unsigned int cpu_idx) 595d893410SBoyan Karatotev { 605d893410SBoyan Karatotev gicv2_cpuif_disable(); 615d893410SBoyan Karatotev } 625d893410SBoyan Karatotev 635d893410SBoyan Karatotev /****************************************************************************** 645d893410SBoyan Karatotev * ARM common helper to initialize the per cpu distributor interface in GICv2 655d893410SBoyan Karatotev *****************************************************************************/ 665d893410SBoyan Karatotev void gic_pcpu_init(unsigned int cpu_idx) 675d893410SBoyan Karatotev { 685d893410SBoyan Karatotev gicv2_pcpu_distif_init(); 695d893410SBoyan Karatotev gicv2_set_pe_target_mask(plat_my_core_pos()); 705d893410SBoyan Karatotev } 715d893410SBoyan Karatotev 725d893410SBoyan Karatotev /****************************************************************************** 735d893410SBoyan Karatotev * Stubs for Redistributor power management. Although GICv2 doesn't have 745d893410SBoyan Karatotev * Redistributor interface, these are provided for the sake of uniform GIC API 755d893410SBoyan Karatotev *****************************************************************************/ 765d893410SBoyan Karatotev void gic_pcpu_off(unsigned int cpu_idx) 775d893410SBoyan Karatotev { 785d893410SBoyan Karatotev return; 795d893410SBoyan Karatotev } 805d893410SBoyan Karatotev 815d893410SBoyan Karatotev /****************************************************************************** 825d893410SBoyan Karatotev * ARM common helper to save & restore the GICv3 on resume from system suspend. 835d893410SBoyan Karatotev * The normal world currently takes care of saving and restoring the GICv2 845d893410SBoyan Karatotev * registers due to legacy reasons. Hence we just initialize the Distributor 855d893410SBoyan Karatotev * on resume from system suspend. 865d893410SBoyan Karatotev *****************************************************************************/ 875d893410SBoyan Karatotev void gic_save(void) 885d893410SBoyan Karatotev { 895d893410SBoyan Karatotev return; 905d893410SBoyan Karatotev } 915d893410SBoyan Karatotev 925d893410SBoyan Karatotev void gic_resume(void) 935d893410SBoyan Karatotev { 945d893410SBoyan Karatotev gicv2_distif_init(); 955d893410SBoyan Karatotev gicv2_pcpu_distif_init(); 965d893410SBoyan Karatotev } 97