xref: /rk3399_ARM-atf/drivers/arm/gic/common/gic_common_private.h (revision cbd3f3706d4217ee3669deeb52b158e84eb97f56)
1e9ec3cecSSoby Mathew /*
2*cbd3f370SJeenu Viswambharan  * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
3e9ec3cecSSoby Mathew  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
5e9ec3cecSSoby Mathew  */
6e9ec3cecSSoby Mathew 
7e9ec3cecSSoby Mathew #ifndef GIC_COMMON_PRIVATE_H_
8e9ec3cecSSoby Mathew #define GIC_COMMON_PRIVATE_H_
9e9ec3cecSSoby Mathew 
10e9ec3cecSSoby Mathew #include <gic_common.h>
11e9ec3cecSSoby Mathew #include <mmio.h>
12e9ec3cecSSoby Mathew #include <stdint.h>
13e9ec3cecSSoby Mathew 
14e9ec3cecSSoby Mathew /*******************************************************************************
15e9ec3cecSSoby Mathew  * GIC Distributor interface register accessors that are common to GICv3 & GICv2
16e9ec3cecSSoby Mathew  ******************************************************************************/
17e9ec3cecSSoby Mathew static inline unsigned int gicd_read_ctlr(uintptr_t base)
18e9ec3cecSSoby Mathew {
19e9ec3cecSSoby Mathew 	return mmio_read_32(base + GICD_CTLR);
20e9ec3cecSSoby Mathew }
21e9ec3cecSSoby Mathew 
22e9ec3cecSSoby Mathew static inline unsigned int gicd_read_typer(uintptr_t base)
23e9ec3cecSSoby Mathew {
24e9ec3cecSSoby Mathew 	return mmio_read_32(base + GICD_TYPER);
25e9ec3cecSSoby Mathew }
26e9ec3cecSSoby Mathew 
27e9ec3cecSSoby Mathew static inline unsigned int gicd_read_iidr(uintptr_t base)
28e9ec3cecSSoby Mathew {
29e9ec3cecSSoby Mathew 	return mmio_read_32(base + GICD_IIDR);
30e9ec3cecSSoby Mathew }
31e9ec3cecSSoby Mathew 
32e9ec3cecSSoby Mathew static inline void gicd_write_ctlr(uintptr_t base, unsigned int val)
33e9ec3cecSSoby Mathew {
34e9ec3cecSSoby Mathew 	mmio_write_32(base + GICD_CTLR, val);
35e9ec3cecSSoby Mathew }
36e9ec3cecSSoby Mathew 
37e9ec3cecSSoby Mathew /*******************************************************************************
38e9ec3cecSSoby Mathew  * GIC Distributor function prototypes for accessing entire registers.
39e9ec3cecSSoby Mathew  * Note: The raw register values correspond to multiple interrupt IDs and
40e9ec3cecSSoby Mathew  * the number of interrupt IDs involved depends on the register accessed.
41e9ec3cecSSoby Mathew  ******************************************************************************/
42e9ec3cecSSoby Mathew unsigned int gicd_read_igroupr(uintptr_t base, unsigned int id);
43e9ec3cecSSoby Mathew unsigned int gicd_read_isenabler(uintptr_t base, unsigned int id);
44e9ec3cecSSoby Mathew unsigned int gicd_read_icenabler(uintptr_t base, unsigned int id);
45e9ec3cecSSoby Mathew unsigned int gicd_read_ispendr(uintptr_t base, unsigned int id);
46e9ec3cecSSoby Mathew unsigned int gicd_read_icpendr(uintptr_t base, unsigned int id);
47e9ec3cecSSoby Mathew unsigned int gicd_read_isactiver(uintptr_t base, unsigned int id);
48e9ec3cecSSoby Mathew unsigned int gicd_read_icactiver(uintptr_t base, unsigned int id);
49e9ec3cecSSoby Mathew unsigned int gicd_read_ipriorityr(uintptr_t base, unsigned int id);
50e9ec3cecSSoby Mathew unsigned int gicd_read_icfgr(uintptr_t base, unsigned int id);
51e9ec3cecSSoby Mathew unsigned int gicd_read_nsacr(uintptr_t base, unsigned int id);
52e9ec3cecSSoby Mathew void gicd_write_igroupr(uintptr_t base, unsigned int id, unsigned int val);
53e9ec3cecSSoby Mathew void gicd_write_isenabler(uintptr_t base, unsigned int id, unsigned int val);
54e9ec3cecSSoby Mathew void gicd_write_icenabler(uintptr_t base, unsigned int id, unsigned int val);
55e9ec3cecSSoby Mathew void gicd_write_ispendr(uintptr_t base, unsigned int id, unsigned int val);
56e9ec3cecSSoby Mathew void gicd_write_icpendr(uintptr_t base, unsigned int id, unsigned int val);
57e9ec3cecSSoby Mathew void gicd_write_isactiver(uintptr_t base, unsigned int id, unsigned int val);
58e9ec3cecSSoby Mathew void gicd_write_icactiver(uintptr_t base, unsigned int id, unsigned int val);
59e9ec3cecSSoby Mathew void gicd_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val);
60e9ec3cecSSoby Mathew void gicd_write_icfgr(uintptr_t base, unsigned int id, unsigned int val);
61e9ec3cecSSoby Mathew void gicd_write_nsacr(uintptr_t base, unsigned int id, unsigned int val);
62e9ec3cecSSoby Mathew 
63e9ec3cecSSoby Mathew /*******************************************************************************
64e9ec3cecSSoby Mathew  * GIC Distributor function prototypes for accessing the GIC registers
65e9ec3cecSSoby Mathew  * corresponding to a single interrupt ID. These functions use bitwise
66e9ec3cecSSoby Mathew  * operations or appropriate register accesses to modify or return
67e9ec3cecSSoby Mathew  * the bit-field corresponding the single interrupt ID.
68e9ec3cecSSoby Mathew  ******************************************************************************/
69e9ec3cecSSoby Mathew unsigned int gicd_get_igroupr(uintptr_t base, unsigned int id);
70e9ec3cecSSoby Mathew void gicd_set_igroupr(uintptr_t base, unsigned int id);
71e9ec3cecSSoby Mathew void gicd_clr_igroupr(uintptr_t base, unsigned int id);
72e9ec3cecSSoby Mathew void gicd_set_isenabler(uintptr_t base, unsigned int id);
73e9ec3cecSSoby Mathew void gicd_set_icenabler(uintptr_t base, unsigned int id);
74e9ec3cecSSoby Mathew void gicd_set_ispendr(uintptr_t base, unsigned int id);
75e9ec3cecSSoby Mathew void gicd_set_icpendr(uintptr_t base, unsigned int id);
76*cbd3f370SJeenu Viswambharan unsigned int gicd_get_isactiver(uintptr_t base, unsigned int id);
77e9ec3cecSSoby Mathew void gicd_set_isactiver(uintptr_t base, unsigned int id);
78e9ec3cecSSoby Mathew void gicd_set_icactiver(uintptr_t base, unsigned int id);
79e9ec3cecSSoby Mathew void gicd_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri);
80e9ec3cecSSoby Mathew 
81e9ec3cecSSoby Mathew #endif /* GIC_COMMON_PRIVATE_H_ */
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